• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.6
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• pp.1157-1165
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• 2009

In AC-PDP, it is necessary to achieve high luminance efficiency, high luminance and high definition by adopting technologies such as high xenon concentration, MgO doping, and long gap. However, it is very difficult to apply above technologies because they make the driving voltage margin reduced. Especially, high Xe concentration technology for high efficacy makes not only the driving voltage margin reduced but also the stability of reset discharge decreased at low temperature. In this paper, we studied temperature and voltage dependent stability of reset discharge and present the experimental results of the discharge characteristics at low temperature. In addition, we suggested the mechanism of bright noise and black noise at low temperature. Finally, we proposed double reset waveform to improve the bright noise and descending scan time method to improve the black noise.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.12
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• pp.1175-1183
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• 2009

In photovoltaic(PV) generator systems, DC-DC converters are significantly considered for control system performance in power quality point of view. This paper presents a novel adaptive control method for DC-DC converters applied in PV generator systems. First, we derive a state-space average model of the converter system and then propose a reset control methodology to enhance transient response performance for time-varying PV systems. For estimating parameters of a reset control, a gradient descent optimization is utilized and an adjustment rule of them are derived respectively. An objective of the optimization is that characteristic equation of an augmented system model which is formed with an converter system model and an reset control is to trace a predefined polynomial given as a reference characteristic model. Next, we accomplish stability analysis by means of a well-known Lyapunov theory for nonlinear converter systems including time-varying voltage excitation from a PV generator. Numerical simulation demonstrates reliability of our control methodology and its superiority by comparison to a traditional control strategy.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.728-731
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• 2009

A negative waveform having inverted polarity of conventional waveform during reset and sustain periods was proposed to improve the driving characteristics. In order to control the negative wall-charge distribution, a positive bias on the scan electrode was applied during reset period. Compared to 0 V scan-bias condition, at 8 V scan-bias the formative time lag was improved about 23.95 % and the average time lag was improved about 14.91 %. All experiments were performed with the 42-inch PDP module in XGA resolution.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1329-1330
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• 2007

Phase-change random access memory(PRAM) has many advantages compare with the existing memory. For example, fast programming speed, low programming voltage, high sensing margin, low power consume and long cyclability of read/write. Though it has many advantages, there are some points which must be improved. So, we invented and studied new constitution of $Ge_{1}Se_{1}Te_{2}$ chalcogenide material. Actually, the performance properties have been improved surprisingly. However, crystallization time was as long as ever for amorphization time. In this paper, we studied in order to make set operation time and reset operation voltage reduced. In the present work, by alloying Sb in $Ge_{1}Se_{1}Te_{2}$. we could confirm that improved its set operation time and reset operation voltage. As a result, the method of Sb-alloyed $Ge_{1}Se_{1}Te_{2}$ can be solution to decrease the set operation time and reset operation voltage.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.8
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• pp.52-59
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• 1998

New types of PFD (phase-frequency detector) are proposed with reset time and propagation delay reduced. The perfomrance of our proposed PFDs are confirmed by SPICE simulation with 0.8.mu.m CMOS process parameter. As a result of simulation, the reset time of PFDs are 0.32 nsec and 0.030 nsec in capture-process. The proposed PFDs can be used in hihg-speed phase-licked loop (PLL).

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.3
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• pp.447-457
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• 1994

This paper presents a compensation method for discrete-time control systems with saturation nonlinearities to cope with the reset windup phenomena. The proposed ARW (Anti-Reset Windup) method is motivated by the concept of the equilibrium point. The design parameter of the ARW scheme is explicitly derived by minimizing a reasonable performance index. The resulting dynamics of the compensated controller exhibits the reduced model form of the unsaturated system which can be obtained by the singular perturbational model reduction method. An example is given to illustrate the effectiveness of the proposed method.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.12
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• pp.2189-2195
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• 2007

In this paper, we propose a newly developed selective reset waveform of a ac PDP using the wide erase pulse technique with the control of address bias voltage. Although it is generally understood that the wide pulse erasing methode shows the narrow driving margin in an opposite discharge type ac PDP, we could obtain a moderate driving margin in a 3-electrode surface discharge type ac PDP. The obtained driving margin shows a strong dependency on the sustain voltage and the address bias voltage. The lower the sustain and the address bias voltage, the wider the driving margin. The pulse width of the proposed waveform is only $10{\mu}s$, which gives additional time to the sustain period, hence increases the brightness. The brightness and contrast ratio increase about 20% together comparing to the conventional ramp type selective reset waveform with the driving scheme of 10 subfield ADS method. The driving margin was measured with the line by line addressed pattern on the white test panel of 2inch diagonal size and the discharge gas was Ne+Xe4%, 400torr.

• Journal of Internet Computing and Services
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• v.8 no.5
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• pp.59-66
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• 2007

In korea, TIT(Transport Information Technology) based IP-TV services have been provided in Saemaeul trains and some sections of subway trains, But the software systems for the service performed in alternated fashions and suffered from many problems such as suspension, memory leaking and overflow, These problems increased playback loss time and resulted in bad reliabilities, In this paper, a software TIT monitor is designed and implemented for Monitoring module and Reset module in physically poor environments, The designed system formalized monitoring time intervals for effective monitoring, Through the real experiments, playback time is improved in 7.2% comparing to existing system.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.10
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• pp.916-922
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• 2008

AC PDP with MgO protective layer coated with the optimum evaporation rate of $5{\AA}/s$ can generate more enhanced efficiency through the vacuum in-line sealing process. However, the optimized process conditions still require the optimum driving scheme on the ramp-up and ramp-down slope of the reset waveform for enhancing the efficiency. In this paper, for the in-situ vacuum sealed PDP with the optimum evaporation rate of MgO protective layer, the address delay time was investigated with various slopes of ramp waveform during a reset ramp-up and ramp-down period. In this study, the minimum statistical delay time was obtained at the ramp-up rate of $6.0 V/{\mu}s$ and the ramp-down rate of $0.7 V/{\mu}s$ of the reset waveform.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.3
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• pp.31-39
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• 2001

In this paper, we proposed a new pixel circuit of the CMOS image sensor for high dynamic range operation, which is based on a multiple sampling scheme and a conditional reset circuit. To expand the pixel dynamic range, the output is multiple-sampled in the integration time. In each sampling, the pixel output is compared with a reference voltage, and the result of comparison may activate the conditional reset circuit. The times of conditional reset, N, during the integration will contribute to the increase of the dynamic range by the times of N. The test chip was fabricated with 0.65-${\mu}m$ CMOS technology (2-P, 2-M).