• Journal of the Korea Society of Computer and Information
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• v.21 no.5
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• pp.57-64
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• 2016

In this paper, we propose the design of railway safety common data model to provide common transformation method for collecting data from railway facility fields to Real-time railway safety monitoring and control system. This common data model is divided into five abstract sub-models according to the characteristics of data such as 'StateInfoMessage', 'ControlMessage', 'RequestMessage', 'ResponseMessage' and 'ExtendedXXXMessage'. This kind of model structure allows diverse heterogeneous data acquisitions and its common conversion method to DDS (Data Distribution Service) format to share data to the sub-systems of Real-time railway safety monitoring and control system. This paper contains the design of common data model and its DDS Topic expression for DDS communication, and presents two kinds of data transformation case studied for verification of the model design.

• Speech Sciences
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• v.10 no.2
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• pp.65-75
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• 2003

This paper describes the issues associated with the real-time implementation of G.723.1A dual-rate speech coder on a TMS320VC5402 DSP. Firstly, the main features of the G.723.1A speech coder and the procedure involved in the implementation using assembly and C languages are discussed. Various real-time implementation issues such as memory/MIPS tradeoffs are also presented. For fixed-point implementation, we converted the ITU-T fixed-point ANSI C code into TMS320VC5402 code in the bit-exact way through verification using the test vectors. Finally, as the result of implementation, we present the MIPS and memory requirement for the real-time operation.

• Journal of Electrical Engineering and Technology
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• v.1 no.1
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• pp.23-27
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• 2006

In this paper a Hybrid Real Time HVDC Simulator fur both operator Training and Researching in the Cheju-Haenam HVDC System is proposed and its performance is studied by means of RTDS (Real Time Digital Simulator), EMTDC (Electro-Magnetic Transients system for DC), PSS/E (Power System Simulator for Engineering), and experienced scenarios. The objective of this paper is to represent the strategy in development for KEPCO's hybrid HVDC simulator for the Cheju-Haenam HVDC system. This simulator consists of two DC stations, DC cables, external digital/analog controllers, monitoring systems and control desk for education, and AC networks. Its suitability for operator's education is tested during startup/shutdown and normal state operations. Dynamic performances of it are also verified.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2112-2115
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• 2003

The system for the real time face detection is described in this paper. For face verification, support vector machine (SVM) was utilized. Although SVM performs quit well, SVM has a drawback that the computational cost is high because all pixels in a mask are used as an input feature vector of SVM. To resolve this drawback, a method to reduce the dimension of feature vectors using the integer DCT was proposed. Also for the real time face detection applications, low-complexity methods for face candidate detection in a gray image were used. As a result, the accurate face detection was performed in real time.

• Journal of Electrical Engineering and Technology
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• v.7 no.3
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• pp.429-435
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• 2012

In this study, a real-time architecture for the detection of clock jumps in the GPS clock behavior is proposed. GPS satellite atomic clocks have characteristics of a second order polynomial in the long term showing sudden jumps occasionally. As satellite clock anomalies influence on GPS measurements which could deliver wrong position information to users as a result, it is required to develop a real time technique for the detection of the clock anomalies especially on the real-time GPS applications such as aviation. The proposed strategy is based on Teager Energy operator, which can be immediately detect any changes in the satellite clock bias estimated from GPS carrier phase measurements. The verification results under numerous cases in the presence of clock jumps are demonstrated.

• International journal of advanced smart convergence
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• v.11 no.3
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• pp.56-63
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• 2022

Cyber-physical systems (CPSs) can solve real problems by utilizing closely connected resources in the cyber world. Most problems arise because the physical world is uncertain and unpredictable. To address this uncertainty, information pouring from numerous devices must be collected in real-time, and each interconnected device must share the information. At this time, CPS must meet timing-related techniques and strict timing constraints that can deliver accurate information within predefined deadlines in order to interact closely beyond simply connecting the cyber and physical worlds. Timing errors in safety-critical systems, such as automobiles, aviation, and medical systems, can lead to catastrophic disasters. In this paper, we classify timing problems into two types: real-time delay and synchronization problems. The results of this study can be used in the entire process of CPS system design, implementation, operation, verification, and maintenance. As a result, it can contribute to securing the safety and reliability of CPS.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.8A
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• pp.804-813
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• 2006

In wireless Internet environment that demand of wireless Internet service increase steadily, wireless PKI(Public Key Infrastructure) service is appearing on stage as necessary essential base technology for information protection service offer, In this paper, we propose the method for verification to reduce the communication overload using VID to CSMP made with a goal of the performance guarantee for security and use in a real time and examine the existent certificate verification methods. The performance of security and the use in a real time is guaranteed by managing the note of authentification by the person who verifies and reducing the amount of the data transmission using VID.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.52 no.7
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• pp.393-400
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• 2003

This paper discusses how to implement and verify a software model of the digital relay that can be added to real time digital simulator(RTDS) model library and is then subjected to the same outputs as the actual relay. The software model is stand-alone and can be used with real relays. It is also possible to conduct interactive real-time tests when the system effects of the relay action need to be investigated. The characteristics of mho type and the quadrilateral type, which is commonly used in recently developed relays, are modeled in this paper. Single circuit line and double circuit line system are used for model verification. The transmission lines are each 100 km in length and are modeled as distributed parameter lines but not frequency dependent. The transmission lines in the single circuit system are modeled as ideally transposed line. The mutual coupling data with the parallel line was taken account in the transmission lines for the double circuit system. The main CTs and PTs are included and operated in their linear region during the tests. For the purpose of testing the relay model accuracy the faults have been applied at various points on the protected line. Its accuracy is assessed against theoretical values.

• Journal of IKEEE
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• v.19 no.4
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• pp.460-464
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• 2015

This paper proposes a panoramic image stitching that operates in real time at the embedded environment by applying ROI and PROSAC algorithm. The conventional panoramic image stitching applies SURF or SIFT algorithm which contains complicated operations and a lots of data, at the overall image to detect feature points. Also it applies RANSAC algorithm to remove outliers, so that an additional verification time is required due to its randomness. In this paper, unnecessary data are eliminated by setting ROI based on the characteristics of panorama images, and PROSAC algorithm is applied for removing outliers to reduce verification time. The proposed method was implemented on the ORDROID-XU board with ARM Cortex-A15. The result shows an improvement of about 54% in the processing time compared to the conventional method.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.10
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• pp.458-464
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• 1986

This paper introduces a method for design verification and performance evaluation of flight control system. The method is a real time hardware in the loop simulation using the hybrid computer and motion table facility. As a typical illustration, a roll control system of flight vehicle is applied. The simulation validity is demonstrated by comparing hardware test results with analog simulation results.