• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.438-440
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• 2004

Energy consumption has become an increasingly important consideration in designing real-time embedded systems. In this paper, we propose a voltage scaling method to reduce energy consumption in fixed priority real-time systems using variable voltage processors. The Hyperperiod of tasks is divided into dimains. The most suitable voltage of each domain is determined off-line and stored in a table. During task execution, the voltage of processor is adjusted according to the information of the table. A simulation result shows that the proposed method can reduce 80% of power consumption in comparison to no power management. The difference to the optimal EDF based method is only 5%.

• Proceedings of the Korean Information Science Society Conference
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• 2005.07a
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• pp.430-432
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• 2005

센서 네트워크를 구성하는 대부분의 센서 노드들은 제한된 용량의 배터리로부터 전력을 공급받는다. 그러한 센서 노드들의 수명은 장착된 배터리의 수명에 의해 결정되기 때문에 배터리의 수명을 최대화시키는 것이 센서 네트워크 응용 설계에서 중요한 고려 사항이 된다. 한편, 배터리는 전력 소모 패턴에 따라 전지가 제공할 수 있는 총 용량이 일정하지 않으며 방전이 진행됨에 따라서 비선형적인 특성을 보이기 때문에, 배터리의 수명은 연결된 로드의 특성에 따라서 항상 다르게 결정된다. 본 논문에서는 그러한 배터리의 방전 특성을 고려한 실시간 태스크 스케줄링 알고리즘을 제안한다. 실험을 통하여 얻은 결과는 제안된 배터리의 특성을 고려한 태스크 스케줄링 알고리즘이 그렇지 않은 태스크 스케줄링 알고리즘에 비해 배터리 수명을 향상시킴을 보인다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.11
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• pp.2801-2809
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• 1996

Scheduling problems in real-time systems are known to be NP-hard. the heuristic approaches aregenerally aplied to solve a certain class of systems. One of such cases is to allocate periodic tasks to multiprocessors while the moethod assures the requirement of the deadine constraints of real-time systems. The study on the allocation of periodic taks includes RMNF, RMFF, FFDUF and Next-Fit-M algorithms, which make a set of task grups first and then allocate to processors. This papre proposes the various algorithms which are based on the Next-Fit-M. To analyze the four proposed methods, simulation was carried on, in which the sample tasks are randomly generated with the various time intervals. The proposed algorithms reduce the number of processors compared with the conventional methods.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.1
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• pp.135-140
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• 2020

Recently, due to the rapid diffusion of intelligent systems and IoT technologies, power saving techniques in real-time embedded systems has become important. In this paper, we propose P-GA (Parallel Genetic Algorithm), a scheduling algorithm aims at reducing the power consumption of real-time systems in multi-core hybrid memory environments. P-GA improves the Proportional-Fairness (PF) algorithm devised for multi-core environments by combining the dynamic voltage/frequency scaling of the processor with the nonvolatile memory technologies. Specifically, P-GA applies genetic algorithms for optimizing the voltage and frequency modes of processors and the memory types, thereby minimizing the power consumptions of the task set. Simulation experiments show that the power consumption of P-GA is reduced by 2.85 times compared to the conventional schemes.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.3_4
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• pp.170-186
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• 2004

Recently, for real-time applications such as multimedia and signal processing, it becomes increasingly important to provide a probabilistic guarantee that each task in the application meets its deadline with a given probability. To provide the probabilistic guarantee, an analysis method is needed that can accurately predict the deadline miss probability for each task in a given system. This paper proposes a stochastic analysis method for real-time systems that use priority-driven scheduling, such as Rate Monotonic and Earliest Deadline First, in order to accurately compute the deadline miss probability of each task in the system. The proposed method accurately computes the response time distributions for tasks with arbitrary execution time distributions, and thus makes it possible to determine the deadline miss probability of individual tasks. In the paper. through experiments, we show that the proposed method is highly accurate and outperforms exisiting methods proposed in the literature.

• Transactions of the Korean Society of Automotive Engineers
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• v.14 no.3
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• pp.186-195
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• 2006

In real-time control systems, the traditional timing analysis based on worst-case response-time(WCRT) is too conservative for the firm and soft real-time control systems, which permit the maximum utilization factor greater than one. We suggested a probabilistic analysis method possible to apply the firm and soft real-time control systems under considering dependency relationship between tasks. The proposed technique determines the deadline miss probability(DMP) of each task from computing the average response-time distribution under a fixed-priority scheduling policy. The method improves the predictable ability forthe average performance and the temporal behavior of real-time control systems.

• Proceedings of the KSRS Conference
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• 2002.10a
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• pp.241-241
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• 2002

MSC(Multi-Spectral Camera) is a main payload of KOMPSAT(Korea Multi-Purpose Satellite)-II which will be launched in 2004. MSC will perform his mission with the GSD(Ground Sample Distance) of 1m, swath width of 15km and spectral range of 450nm~900nm at the altitude of 685km. MSC consists of three main subsystems. One is EOS(Electro-Optics Subsystem), another is PMU(Payload Management Unit) and the other is PDTS(Payload Data Transmission Subsystem). There is an SBC(Single Board Computer) in the PW to control all the other units and SBC software performs the interface with spacecraft and control all MSC sub-units. SBC software consists of a lot of tasks and manages them with the time criticalness. All tasks are designed to be scheduled and executed at the predetermined time in order to make sure that the mission of MSC system is achieved successfully. In this paper, the real-time task scheduling of the SBC software will be described and analyzed.

• Journal of Korea Society of Industrial Information Systems
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• v.27 no.6
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• pp.69-75
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• 2022

We propose energy-efficient scheduling considering real-time constraints and energy efficiency in smart mobile with heterogeneous multi-core structure. Recently, high-performance applications such as VR, AR, and 3D game require real-time and high-level processings. The big.LITTLE architecture is applied to smart mobiles devices for high performance and high energy efficiency. However, there is a problem that the energy saving effect is reduced because LITTLE cores are not properly utilized. This paper proposes a heterogeneous multi-core assignment technique that improves real-time performance and high energy efficiency with big.LITTLE architecture. Our proposed method optimizes the energy consumption and the execution time by predicting the actual task execution time using SVM (Support Vector Machine). Experiments on an off-the-shelf smartphone show that the proposed method reduces energy consumption while ensuring the similar execution time to legacy schemes.

• Journal of Computing Science and Engineering
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• v.8 no.1
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• pp.43-56
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• 2014

Semi-partitioned scheduling is a new approach for allocating tasks on multiprocessor platforms. By splitting some tasks between processors, semi-partitioned scheduling is used to improve processor utilization. In this paper, a new semi-partitioned scheduling algorithm called SS-DRM is proposed for multiprocessor platforms. The scheduling policy used in SS-DRM is based on the delayed rate monotonic algorithm, which is a modified version of the rate monotonic algorithm that can achieve higher processor utilization. This algorithm can safely schedule any system composed of two tasks with total utilization less than or equal to that on a single processor. First, it is formally proven that any task which is feasible under the rate monotonic algorithm will be feasible under the delayed rate monotonic algorithm as well. Then, the existing allocation method is extended to the delayed rate monotonic algorithm. After that, two improvements are proposed to achieve more processor utilization with the SS-DRM algorithm than with the rate monotonic algorithm. According to the simulation results, SS-DRM improves the scheduling performance compared with previous work in terms of processor utilization, the number of required processors, and the number of created subtasks.

• Journal of the Korea Society of Computer and Information
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• v.17 no.8
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• pp.11-19
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• 2012

In this paper, we propose a power-efficient scheduling scheme for lightly loaded multicore processors which contain more processing cores than running tasks. The proposed scheme activates a portion of available cores and inactivates the other unused cores in order to save power consumption. The tasks are assigned to the activated cores based on a heuristic mechanism for fast task assignment. Each activated core executes its assigned tasks with the optimal clock frequency which minimizes the power consumption of the tasks while meeting their deadlines. Evaluation shows that the proposed scheme saves up to 78% power consumption of the previous method which activates as many processing cores as possible for the execution of the given tasks.