• Title/Summary/Keyword: read-circuit

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Design of Small-Area eFuse OTP Memory for Line Scan Sensors (Line Scan Sensor용 저면적 eFuse OTP 설계)

  • Hao, Wenchao;Heo, Chang-Won;Kim, Yong-Ho;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.8
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    • pp.1914-1924
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    • 2014
  • In this paper, a small-area cell array method of reducing number of SL drivers requiring large layout areas, where the SL drivers supplying programming currents are routed in the row direction in stead of the column direction for eFuse OTP memory IPs having less number of rows than that of columns such as a cell array of four rows by eight columns, and a core circuit are proposed. By adopting the proposed cell array and core circuit, the layout area of designed 32-bit eFuse OTP memory IP is reduced. Also, a V2V ($=2V{\pm}10%$) regulator necessary for RWL driver and BL pull-up load to prevent non-blown eFuse from being blown from the EM phenomenon by a big current is designed. The layout size of the designed 32-bit OTP memory IP having a cell array of four rows by eight columns is 13.4% smaller with $120.1{\mu}m{\times}127.51{\mu}m$ ($=0.01531mm^2$) than that of the conventional design with $187.065{\mu}m{\times}94.525{\mu}m$ ($=0.01768mm^2$).

The Realization of RFID Tag Data Communication System Using CC1020 (CC1020을 이용한 RFID Tag 데이터 통신 시스템 구현)

  • Jo, Heung-Kuk
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.4
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    • pp.833-838
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    • 2011
  • RFID system in manufacturing industry is used to collect, categorize, and process the data of products. To install RFID system for a large factory, a large amount of wired data communication network is necessary for RS232 communication. If the installed location of RFID system in the factory is changed or extended, a reinstallment is required for the already installed wired data network. A large amount of time/financial reinvestment is necessary for such reinstallation. By using wireless data communication network, however, the initial installation and reinstallation are very simple. In this paper, we implemented a wireless communication system and RFID system. We used the CC1020 chip for wireless communication system and EM4095 chip for RFID system. CC1020 chip enables highly-reliable data communication, and by setting a simple status register, it can switch between transmitting/receiving status and it can choose the desired frequency of either 400 MHz or 900 MHz. Also, Communication range is 50 m, if external antenna is used. EM4095 is a chip for RFID reader system with the carrier frequency of 125 KHz. This chip can implement the reader system by connecting a small number of components. And EM4100 was used for RFID system. EM4100 is read-only type. Atmega128 is used to control a wireless communication system and RFID system. We confirm that the system can communicate without error up to 50 m from sender. In the paper, the circuit diagram and operation program for CC1020 and RFID system are presented. The system used in the experiment is shown in pictures, and the data movement pattern of CC1020 is shown in the diagram, and the performance of each transmission method is presented.

Analysis of Subwavelength Metal Hole Array Structure for the Enhancement of Quantum Dot Infrared Photodetectors

  • Ha, Jae-Du;Hwang, Jeong-U;Gang, Sang-U;No, Sam-Gyu;Lee, Sang-Jun;Kim, Jong-Su;Krishna, Sanjay;Urbas, Augustine;Ku, Zahyun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.334-334
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    • 2013
  • In the past decade, the infrared detectors based on intersubband transition in quantum dots (QDs) have attracted much attention due to lower dark currents and increased lifetimes, which are in turn due a three-dimensional confinement and a reduction of scattering, respectively. In parallel, focal plane array development for infrared imaging has proceeded from the first to third generations (linear arrays, 2D arrays for staring systems, and large format with enhanced capabilities, respectively). For a step further towards the next generation of FPAs, it is envisioned that a two-dimensional metal hole array (2D-MHA) structures will improve the FPA structure by enhancing the coupling to photodetectors via local field engineering, and will enable wavelength filtering. In regard to the improved performance at certain wavelengths, it is worth pointing out the structural difference between previous 2D-MHA integrated front-illuminated single pixel devices and back-illuminated devices. Apart from the pixel linear dimension, it is a distinct difference that there is a metal cladding (composed of a number of metals for ohmic contact and the read-out integrated circuit hybridization) in the FPA between the heavily doped gallium arsenide used as the contact layer and the ROIC; on the contrary, the front-illuminated single pixel device consists of two heavily doped contact layers separated by the QD-absorber on a semi-infinite GaAs substrate. This paper is focused on analyzing the impact of a two dimensional metal hole array structure integrated to the back-illuminated quantum dots-in-a-well (DWELL) infrared photodetectors. The metal hole array consisting of subwavelength-circular holes penetrating gold layer (2DAu-CHA) provides the enhanced responsivity of DWELL infrared photodetector at certain wavelengths. The performance of 2D-Au-CHA is investigated by calculating the absorption of active layer in the DWELL structure using a finite integration technique. Simulation results show the enhanced electric fields (thereby increasing the absorption in the active layer) resulting from a surface plasmon, a guided mode, and Fabry-Perot resonances. Simulation method accomplished in this paper provides a generalized approach to optimize the design of any type of couplers integrated to infrared photodetectors.

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A Study on Automatic Interface Generation by Protocol Mapping (Protocol Mapping을 이용한 인터페이스 자동생성 기법 연구)

  • Lee Ser-Hoon;Kang Kyung-Goo;Hwang Sun-Young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.8A
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    • pp.820-829
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    • 2006
  • IP-based design methodology has been popularly employed for SoC design to reduce design complexity and to cope with time-to-market pressure. Due to the request for high performance of current mobile systems, embedded SoC design needs a multi-processor to manage problems of high complexity and the data processing such as multimedia, DMB and image processing in real time. Interface module for communication between system buses and processors are required, since many IPs employ different protocols. High performance processors require interface module to minimize the latency of data transmission during read-write operation and to enhance the performance of a top level system. This paper proposes an automatic interface generation system based on FSM generated from the common protocol description sequence of a bus and an IP. The proposed interface does not use a buffer which stores data temporally causing the data transmission latency. Experimental results show that the area of the interface circuits generated by the proposed system is reduced by 48.5% on the average, when comparing to buffer-based interface circuits. Data transmission latency is reduced by 59.1% for single data transfer and by 13.3% for burst mode data transfer. By using the proposed system, it becomes possible to generate a high performance interface circuit automatically.

DEVELOPMENT OF THE READOUT CONTROLLER FOR INFRARED ARRAY (적외선검출기 READOUT CONTROLLER 개발)

  • Cho, Seoung-Hyun;Jin, Ho;Nam, Uk-Won;Cha, Sang-Mok;Lee, Sung-Ho;Yuk, In-Soo;Park, Young-Sik;Pak, Soo-Jong;Han, Won-Yong;Kim, Sung-Soo
    • Publications of The Korean Astronomical Society
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    • v.21 no.2
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    • pp.67-74
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    • 2006
  • We have developed a control electronics system for an infrared detector array of KASINICS (KASI Near Infrared Camera System), which is a new ground-based instrument of the Korea Astronomy and Space science Institute (KASI). Equipped with a $512{\times}512$ InSb array (ALADDIN III Quadrant, manufactured by Raytheon) sensitive from 1 to $5{\mu}m$, KASINICS will be used at J, H, Ks, and L-bands. The controller consists of DSP(Digital Signal Processor), Bias, Clock, and Video boards which are installed on a single VME-bus backplane. TMS320C6713DSP, FPGA(Field Programmable Gate Array), and 384-MB SDRAM(Synchronous Dynamic Random Access Memory) are included in the DSP board. DSP board manages entire electronics system, generates digital clock patterns and communicates with a PC using USB 2.0 interface. The clock patterns are downloaded from a PC and stored on the FPGA. UART is used for the communication with peripherals. Video board has 4 channel ADC which converts video signal into 16-bit digital numbers. Two video boards are installed on the controller for ALADDIN array. The Bias board provides 16 dc bias voltages and the Clock board has 15 clock channels. We have also coded a DSP firmware and a test version of control software in C-language. The controller is flexible enough to operate a wide range of IR array and CCD. Operational tests of the controller have been successfully finished using a test ROIC (Read-Out Integrated Circuit).

A Design of Digital CMOS X-ray Image Sensor with $32{\times}32$ Pixel Array Using Photon Counting Type (포톤 계수 방식의 $32{\times}32$ 픽셀 어레이를 갖는 디지털 CMOS X-ray 이미지 센서 설계)

  • Sung, Kwan-Young;Kim, Tae-Ho;Hwang, Yoon-Geum;Jeon, Sung-Chae;Jin, Seung-Oh;Huh, Young;Ha, Pan-Bong;Park, Mu-Hun;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.7
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    • pp.1235-1242
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    • 2008
  • In this paper, x-ray image sensor of photon counting type having a $32{\times}32$ pixel array is designed with $0.18{\mu}m$ triple-well CMOS process. Each pixel of the designed image sensor has an area of loot $100{\times}100\;{\mu}m2$ and is composed of about 400 transistors. It has an open pad of an area of $50{\times}50{\mu}m2$ of CSA(charge Sensitive Amplifier) with x-ray detector through a bump bonding. To reduce layout size, self-biased folded cascode CMOS OP amp is used instead of folded cascode OP amp with voltage bias circuit at each single-pixel CSA, and 15-bit LFSR(Linear Feedback Shift Register) counter clock generator is proposed to remove short pulse which occurs from the clock before and after it enters the counting mode. And it is designed that sensor data can be read out of the sensor column by column using a column address decoder to reduce the maximum current of the CMOS x-ray image sensor in the readout mode.

Investigation of the Signal Characteristics of a Small Gamma Camera System Using NaI(Tl)-Position Sensitive Photomultiplier Tube (NaI(Tl) 섬광결정과 위치민감형 광전자증배관을 이용한 소형 감마카메라의 신호 특성 고찰)

  • Choi, Yong;Kim, Jong-Ho;Kim, Joon-Young;Im, Ki-Chun;Kim, Sang-Eun;Choe, Yearn-Seong;Lee, Kyung-Han;Joo, Koan-Sik;Kim, Byung-Tae
    • The Korean Journal of Nuclear Medicine
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    • v.34 no.1
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    • pp.82-93
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    • 2000
  • Purpose: We characterized the signals obtained from the components of a small gamma camera using Nal(Tl)-position sensitive photomultiplier tube (PSPMT) and optimized the parameters employed in the modules of the system. Materials and Methods: The small gamma camera system consists of a Nal(Tl) crystal ($60{\times}60{\times}6mm^3$) coupled with a Hamamatsu R3941 PSPMT, a resister chain circuit, preamplifiers, nuclear instrument modules (NIMs), an analog to digital converter and a personal computer for control and display. The PSPMT was read out using a resistive charge division circuit which multiplexes the 34 cross wire anode channels into 4 signals (X+, X-, Y+, Y -). Those signals were individually amplified by four preamplifiers and then, shaped and amplified by amplifiers. The signals were discriminated and digitized via triggering signal and used to localize the position of an event by applying the Anger logic. The gamma camera control and image display was performed by a program implemented using a graphic software. Results: The characteristics of signal and the parameters employed in each module of the system were presented. The intrinsic sensitivity of the system was approximately $8{\times}10^3$ counts/sec/${\mu}Ci$. The intrinsic energy resolution of the system was 18% FWHM at 140 keV. The spatial resolution obtained using a line-slit mask and $^{99m}Tc$ point source were, respectively, 2.2 and 2.3 mm FWHM in X and Y directions. Breast phantom containing $2{\sim}7mm$ diameter spheres was successfully imaged with a parallel hole collimator. The image displayed accurate size and activity distribution over the imaging field of view Conclusion: We proposed a simple method for development of a small gamma camera and presented the characteristics of the signals from the system and the optimized parameters used in the modules of the small gamma camera.

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Switching and Leakage-Power Suppressed SRAM for Leakage-Dominant Deep-Submicron CMOS Technologies (초미세 CMOS 공정에서의 스위칭 및 누설전력 억제 SRAM 설계)

  • Choi Hoon-Dae;Min Kyeong-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.3 s.345
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    • pp.21-32
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    • 2006
  • A new SRAM circuit with row-by-row activation and low-swing write schemes is proposed to reduce switching power of active cells as well as leakage one of sleep cells in this paper. By driving source line of sleep cells by $V_{SSH}$ which is higher than $V_{SS}$, the leakage current can be reduced to 1/100 due to the cooperation of the reverse body-bias. Drain Induced Barrier Lowering (DIBL), and negative $V_{GS}$ effects. Moreover, the bit line leakage which may introduce a fault during the read operation can be eliminated in this new SRAM. Swing voltage on highly capacitive bit lines is reduced to $V_{DD}-to-V_{SSH}$ from the conventional $V_{DD}-to-V_{SS}$ during the write operation, greatly saving the bit line switching power. Combining the row-by-row activation scheme with the low-swing write does not require the additional area penalty. By the SPICE simulation with the Berkeley Predictive Technology Modes, 93% of leakage power and 43% of switching one are estimated to be saved in future leakage-dominant 70-un process. A test chip has been fabricated using $0.35-{\mu}m$ CMOS process to verify the effectiveness and feasibility of the new SRAM, where the switching power is measured to be 30% less than the conventional SRAM when the I/O bit width is only 8. The stored data is confirmed to be retained without loss until the retention voltage is reduced to 1.1V which is mainly due to the metal shield. The switching power will be expected to be more significant with increasing the I/O bit width.

Development of a Small Gamma Camera Using NaI(T1)-Position Sensitive Photomultiplier Tube for Breast Imaging (NaI (T1) 섬광결정과 위치민감형 광전자증배관을 이용한 유방암 진단용 소형 감마카메라 개발)

  • Kim, Jong-Ho;Choi, Yong;Kwon, Hong-Seong;Kim, Hee-Joung;Kim, Sang-Eun;Choe, Yearn-Seong;Lee, Kyung-Han;Kim, Moon-Hae;Joo, Koan-Sik;Kim, Byuug-Tae
    • The Korean Journal of Nuclear Medicine
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    • v.32 no.4
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    • pp.365-373
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    • 1998
  • Purpose: The conventional gamma camera is not ideal for scintimammography because of its large detector size (${\sim}500mm$ in width) causing high cost and low image quality. We are developing a small gamma camera dedicated for breast imaging. Materials and Methods: The small gamma camera system consists of a NaI (T1) crystal ($60 mm{\times}60 mm{\times}6 mm$) coupled with a Hamamatsu R3941 Position Sensitive Photomultiplier Tube (PSPMT), a resister chain circuit, preamplifiers, nuclear instrument modules, an analog to digital converter and a personal computer for control and display. The PSPMT was read out using a standard resistive charge division which multiplexes the 34 cross wire anode channels into 4 signals ($X^+,\;X^-,\;Y^+,\;Y^-$). Those signals were individually amplified by four preamplifiers and then, shaped and amplified by amplifiers. The signals were discriminated ana digitized via triggering signal and used to localize the position of an event by applying the Anger logic. Results: The intrinsic sensitivity of the system was approximately 8,000 counts/sec/${\mu}Ci$. High quality flood and hole mask images were obtained. Breast phantom containing $2{\sim}7 mm$ diameter spheres was successfully imaged with a parallel hole collimator The image displayed accurate size and activity distribution over the imaging field of view Conclusion: We have succesfully developed a small gamma camera using NaI(T1)-PSPMT and nuclear Instrument modules. The small gamma camera developed in this study might improve the diagnostic accuracy of scintimammography by optimally imaging the breast.

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