• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.2
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• pp.77-79
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• 1992

We propose a self-aligned and double recessed technique for GaAs power MESFETs application. The gate length and the wide recess width are defined by a selective removal of the SiN layer using reactive ion etching(RIE) while the depth of the channel is defined by chemical etching of GaAs layers. The threshold voltages and the saturation drain voltage could be sucessfully controlled using this technique. The lateral-etched distance increases with the dry etching time and the source-drain breakdown voltage of MESFET increases up to about 30V at a pinch-off condition. The electrical characteristics of a MESFET with a gate length of 2 x10S0-6Tm and a source-gate spacing of 33 x10S0-6Tm show maximum transconductance of 120 mS/mm and saturation drain current density of 170-190mA/mm at a gate voltage of 0.8V.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.2
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• pp.25-32
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• 1998

In this paper, we report the result of the three-dimensional topography simultor, 3D-SURFILER(SURface proFILER) for the simulation of topographical evalution of the surface, curing a plasma etching process. We employed cell-removal algorithm to represent the topographical evoluation of the surface. The visibility with shadow effect was developed and applied to the spillover algorithm. To demonstrate the capability of 3D-SURFILER, we compared with simulated profiles with the SEM picture for dry and reactive ion etching(RIE) of the Si$_{3}$N$_{4}$ film and Pt film.

• Journal of the Korean Ceramic Society
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• v.53 no.3
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• pp.349-353
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• 2016

We prepared a number of reaction-bonded silicon carbides (RBSCs) made from various mixing ratios of raw SiC particles, and investigated their microstructure and etch characteristics by Reactive Ion Etch (RIE). Increasing the amount of $9.5{\mu}m$-SiC particles results in a microstructure with relatively coarser Si regions. On the other hand, increasing that of $2.6{\mu}m$-SiC particles produces much finer Si regions. The addition of more than 50 wt% of $2.6{\mu}m$-SiC particles, however, causes the microstructure to become partially coarse. We also evaluated their etching behaviors in terms of surface roughness (Ra), density and weight changes, and microstructure development by employing Confocal Laser Scanning Microscope (CLSM) and Scanning Electron Microscope (SEM) techniques. During the etching process of the prepared samples, we confirmed that the residual Si region was rapidly removed and formed pits isolating SiC particles as islands. This leads to more intensified ion field on the SiC islands, and causes physical corrosion on them. Increased addition of $2.6{\mu}m$-SiC particles produces finer residual Si region, and thus decreases the surface roughness (Ra.) as well as causing weight loss after etching process by following the above etching mechanism.

• Korean Journal of Materials Research
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• v.20 no.10
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• pp.550-554
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• 2010

This work presents a fabrication procedure to make large-area, size-tunable, periodically different shape metal arrays using nanosphere lithography (NSL) combined with ashing and annealing. A polystyrene (PS, 580 ${\mu}m$) monolayer, which was used as a mask, was obtained with a mixed solution of PS in methanol by multi-step spin coating. The mask morphology was changed by oxygen RIE (Reactive Ion Etching) ashing and temperature processing by microwave heating. The Au or Pt deposition resulted in size tunable nano patterns with different morphologies such as hole and dots. These processes allow outstanding control of the size and morphology of the particles. Various sizes of hole patterns were obtained by reducing the size of the PS sphere through the ashing process, and by increasing the size of the PS sphere through annealing treatment, which resulted in tcontrolling the size of the metallic nanoparticles from 30 nm to 230 nm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.20-25
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• 2010

An integrated Mach-Zehnder interferometric sensor operating at 632.8 nm was designed and fabricated by the technology of planar rib waveguides. Rib waveguide based on silica system ($SiO_2-SiO_xN_y-SiO_2$) was geometrically designed to have single mode operation and high sensitivity. It was structured by semiconductor fabrication processes such as thin film deposition, photolithography, and RIE (Reactive Ion Etching). With the power observation, propagation loss measurement by cut-back method showed about 4.82 dB/cm for rib waveguides. Additionally the chromium mask process for an etch stop was employed to solve the core damaging problem in patterning the sensing zone on the chip. Refractive index measurement of water/ethanol mixture with this device finally showed a sensitivity of about $\pi$/($4.04{\times}10^{-3}$).

• Journal of Sensor Science and Technology
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• v.30 no.4
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• pp.267-272
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• 2021

In this study, Ag was deposited to investigate its applicability as a surface-enhanced Raman scattering substrate after forming a grass-type black silicon structure through maskless reactive ion etching. Grass-structured black silicon with heights of 2 - 7 ㎛ was formed at radio-frequency (RF) power of 150 - 170 W. The process pressure was 250 mTorr, the O₂/SF₆ gas ratio was 15/37.5, and the processing time was 10 - 20 min. When the processing time was increased by more than 20 min, the self-masking of Si_xO_yF_z did not occur, and the black silicon structure was therefore not formed. Raman response characteristics were measured based on the Ag thickness deposited on a black silicon substrate. As the Ag thickness increased, the characteristic peak intensity increased. When the Ag thickness deposited on the black silicon substrate increased from 40 to 80 nm, the Raman response intensity at a Raman wavelength of 1507 / cm increased from 8.2 × 10³ to 25 × 10³ cps. When the Ag thickness was 150 nm, the increase declined to 30 × 10³ cps and showed a saturation tendency. When the RF power increased from 150 to 170 W, the response intensity at a 1507/cm Raman wavelength slightly increased from 30 × 10³ to 33 × 10³ cps. However, when the RF power was 200 W, the Raman response intensity decreased significantly to 6.2 × 10³ cps.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.439-439
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• 2012

태양광 발전은 발전 셀의 특성상 태양광의 일사량, 태양과 셀 단면이 이루는 각도에 따라서 발전량의 차이를 가져온다. 실리콘 태양전지의 전면 texturing은 입사광의 반사율을 크게 감소시키고, 태양전지 내에서 빛의 통과길이를 증가시켜 태양전지 내의 흡수하는 빛의 양을 증가 시키는 역할을 한다. 따라서 전면 texturing은 단락전류를 증대시키는 효과를 가지고 온다. 일반적으로 texturing은 alkaline etching (WET) 공정과 reactive ion etching (RIE) 공정이 사용된다. 그리고 다결정 실리콘 태양전지의 경우에는 재료의 결정방향에 따라 식각이 되어지는 WET 공정의 경우 texturing 모양을 제어할 수 없어 효과적이지 못하는 결과를 가지고 온다. 본 연구에서는 Electroluminescence을 측정하여 RIE, WET 공정을 사용하여 만든 texturing 구조의 다결정 태양전지의 Microcrack 및 Defect, Electrode Failure, Hot spot등을 검출하였으며, ${\mu}$-PCD 측정 결과와 비교 분석하여 Micro carrier life time을 유추하여 계산하였다. 또한 반사율을 측정해본 결과 WET 공정 대비 RIE의 경우 단파장영역에서 반사율이 크게 감소하여, 상대적으로 높은 External quantum efficiency (EQE)가 측정되었다. 이는 Jsc를 증가시켜, 태양전지의 효율이 증가되는 결과를 얻을 수 있었다.

• Proceedings of the Optical Society of Korea Conference
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• 2009.02a
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• pp.133-134
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• 2009

Cold temperature development (CTD) of electron beam (EB) patterned resists and subsequent dry etching were investigated for fabrication of nano-patterned Niobium (Nb). Bulky Nb fims on GaAs substrates were deposited with EB evaporation. Line patterns on Nb cathode were fabricated by EB patterning and reactive ion etching (RIE). Size deviations of nano-sized line patterns from CAD designed patterns are dependent on the EB total exposure, but it can be improved by CTD of EB-exposed resist. Line patterns of 10 to 300 nm widths of EB-exposed resist patterns were drawn under various exposure conditions of $0.2{\mu}s$/dot (total 240,000 dot) with a constant current (50 pA). Compared with room temperature development (RTD), the CTD improves pattern resolution due to the suppression of backscattering effect. RIE with $CF_4$ was performed for formation of several nano-sized line patterns on Nb. Each EB-resist patterned samples with RTDs and CTDs were etched with two different $CF_4$ gas pressures of 5 Pa. Nb etching rate increases while GaAs (or ZEP) etching rate decreases as the chamber pressure increases. This different dependent of the etching rate on the $CF_4$ pressure between Nb and GaAs (or ZEP) has a significant meaning because selective etching of nano-sized Nb line patterns is possible without etching of the underlying active layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.21-24
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• 2004

Pseudo-MOSFET의 제작을 위해서는 표면 실리콘 층의 식각 공정이 필요하며, 공정의 간편성으로 인해 주로 RIE(Reactive Ion Etching)를 사용하고 있다. 하지만, RE 공정 도중 발생하는 Plasma에 의해서 SOI 층이 손상을 받게 되고 이 영향으로 소자의 특성이 열화 될 가능성이 있다. 이러한 특성의 열화를 확인하기 위하여 소자 제작을 위한 표면 실리콘 층의 식각을 RIE 공정과 TMAH 용액을 이용한 습식 식각을 각각 행하여 그 특성을 비교한 결과, 건식 식각된 시편에서 계면상태 밀도의 증가, 이동도의 감소 등 특성 열화 현상이 현저히 나타났다. 이러한 RIE 공정 중 발생하는 손상을 제거하기 위하여 저온 열처리를 하였으며 그 결과 $400^{\circ}C$ $N_2$ 분위기에서 4시간 동안 열처리를 하여 습식 식각된 시편과 동일한 특성을 가지게 할 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.400-400
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• 2011

습식 식각과 RIE (reactive ion etching) 텍스처링 된 다결정 실리콘 태양전지의 라미네이팅 공정 전 후에 양자 효율과 광학적 특성 및 전기적 특성의 변화를 관찰 하였다. 두 식각 방법을 이용해 라미네이팅 공정 전 습식 식각의 표면 텍스처 태양전지에 비해 RIE 표면 텍스처태양전지에서 높은 양자 효율이 관측 되었지만, 라미네이팅 공정 후에 두 셀을 비교해 보면 RIE 텍스처링 된 것의 양자 효율이 더 낮아지는 것을 확인 할 수 있었다. 300~1,100 nm의 파장 범위에서 10 nm의 간격으로 양자효율, 반사율, 투과율, 흡수율 및 변환 효율을 측정하였다. 또한, 공정 전 후의 셀의 dark current를 측정하였다. 위 연구 결과를 통해 라미네이팅 공정에 따른 다결정 실리콘 태양전지의 특성 변화를 분석 하였다.