• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
• /
• pp.393-393
• /
• 2012

Optically active nanostructures such as subwavelength moth-eye antireflective structures or surface enhanced Raman spectroscopy (SERS) active structures have been demonstrated to provide the effective suppression of unwanted reflections as in subwavelength structure (SWS) or effective enhancement of selective signals as in SERS. While various nanopatterning techniques such as photolithography, electron-beam lithography, wafer level nanoimprinting lithography, and interference lithography can be employed to fabricate these nanostructures, roll-to-roll (R2R) nanoimprinting is gaining interests due to its low cost, continuous, and scalable process. R2R nanoimprinting requires a master to produce a stamp that can be wrapped around a quartz roller for repeated nanoimprinting process. Among many possibilities, two different types of mask can be employed to fabricate optically active nanostructures. One is self-assembled Au nanoparticles on Si substrate by depositing Au film with sputtering followed by annealing process. The other is monolayer silica particles dissolved in ethanol spread on the wafer by spin-coating method. The process is optimized by considering the density of Au and silica nano particles, depth and shape of the patterns. The depth of the pattern can be controlled with dry etch process using reactive ion etching (RIE) with the mixture of SF6 and CHF3. The resultant nanostructures are characterized for their reflectance using UV-Vis-NIR spectrophotometer (Agilent technology, Cary 5000) and for surface morphology using scanning electron microscope (SEM, JEOL JSM-7100F). Once optimized, these optically active nanostructures can be used to replicate with roll-to-roll process or soft lithography for various applications including displays, solar cells, and biosensors.

• 한국광학회:학술대회논문집
• /
• 한국광학회 2009년도 동계학술발표회 논문집
• /
• pp.133-134
• /
• 2009

Cold temperature development (CTD) of electron beam (EB) patterned resists and subsequent dry etching were investigated for fabrication of nano-patterned Niobium (Nb). Bulky Nb fims on GaAs substrates were deposited with EB evaporation. Line patterns on Nb cathode were fabricated by EB patterning and reactive ion etching (RIE). Size deviations of nano-sized line patterns from CAD designed patterns are dependent on the EB total exposure, but it can be improved by CTD of EB-exposed resist. Line patterns of 10 to 300 nm widths of EB-exposed resist patterns were drawn under various exposure conditions of $0.2{\mu}s$/dot (total 240,000 dot) with a constant current (50 pA). Compared with room temperature development (RTD), the CTD improves pattern resolution due to the suppression of backscattering effect. RIE with $CF_4$ was performed for formation of several nano-sized line patterns on Nb. Each EB-resist patterned samples with RTDs and CTDs were etched with two different $CF_4$ gas pressures of 5 Pa. Nb etching rate increases while GaAs (or ZEP) etching rate decreases as the chamber pressure increases. This different dependent of the etching rate on the $CF_4$ pressure between Nb and GaAs (or ZEP) has a significant meaning because selective etching of nano-sized Nb line patterns is possible without etching of the underlying active layer.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제2권4호
• /
• pp.259-267
• /
• 2002

We present a novel 3D fabrication method with single X-ray process utilizing an X-ray mask in which a micro-actuator is integrated. An X-ray absorber is electroplated on the shuttle mass driven by the integrated micro-actuator during deep X-ray exposures. 3D microstructures are revealed by development kinetics and modulated in-depth dose distribution in resist, usually PMMA. Fabrication of X-ray masks with integrated electrothermal xy-stage and electrostatic actuator is presented along with discussions on PMMA development characteristics. Both devices use $20-\mu\textrm{m}$-thick overhanging single crystal Si as a structural material and fabricated using deep reactive ion etching of silicon-on-insulator wafer, phosphorous diffusion, gold electroplating, and bulk micromachining process. In electrostatic devices, $10-\mu\textrm{m}-thick$ gold absorber on $1mm{\times}1mm$ Si shuttle mass is supported by $10-\mu\textrm{m}-wide$, 1-mm-long suspension beams and oscillated by comb electrodes during X-ray exposures. In electrothermal devices, gold absorber on 1.42 mm diameter shuttle mass is oscillated in x and y directions sequentially by thermal expansion caused by joule heating of the corresponding bent beam actuators. The fundamental frequency and amplitude of the electrostatic devices are around 3.6 kHz and $20\mu\textrm{m}$, respectively, for a dc bias of 100 V and an ac bias of 20 VP-P (peak-peak). Displacements in x and y directions of the electrothermal devices are both around $20{\;}\mu\textrm{m}$at 742 mW input power. S-shaped and conical shaped PMMA microstructures are demonstrated through X-ray experiments with the fabricated devices.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
• /
• pp.436-437
• /
• 2012

Double patterning technology (DPT) has been suggested as a promising candidates of the next generation lithography technology in FLASH and DRAM manufacturing in sub-40nm technology node. DPT enables to overcome the physical limitation of optical lithography, and it is expected to be continued as long as e-beam lithography takes place in manufacturing. Several different processes for DPT are currently available in practice, and they are litho-litho-etch (LLE), litho-etch-litho-etch (LELE), litho-freeze-litho-etch (LFLE), and self-aligned double patterning (SADP) [1]. The self-aligned approach is regarded as more suitable for mass production, but it requires precise control of sidewall space etch profile for the exact definition of hard mask layer. In this paper, we propose etch end point detection (EPD) in spacer etching to precisely control sidewall profile in SADP. Conventional etch EPD notify the end point after or on-set of a layer being etched is removed, but the EPD in spacer etch should land-off exactly after surface removal while the spacer is still remained. Precise control of real-time in-situ EPD may help to control the size of spacer to realize desired pattern geometry. To demonstrate the capability of spacer-etch EPD, we fabricated metal line structure on silicon dioxide layer and spacer deposition layer with silicon nitride. While blanket etch of the spacer layer takes place in inductively coupled plasma-reactive ion etching (ICP-RIE), in-situ monitoring of plasma chemistry is performed using optical emission spectroscopy (OES), and the acquired data is stored in a local computer. Through offline analysis of the acquired OES data with respect to etch gas and by-product chemistry, a representative EPD time traces signal is derived. We found that the SE-EPD is useful for precise control of spacer etching in DPT, and we are continuously developing real-time SE-EPD methodology employing cumulative sum (CUSUM) control chart [2].

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
• /
• pp.658-658
• /
• 2013

Graphene is an attractive material for various device applications due to great electrical properties and chemical properties. However, lack of band gap is significant hurdle of graphene for future electrical device applications. In the past few years, several methods have been attempted to open and tune a band gap of graphene. For example, researchers try to fabricate graphene nanoribbon (GNR) using various templates or unzip the carbon nanotubes itself. However, these methods generate small driving currents or transconductances because of the large amount of scattering source at edge of GNRs. At 2009, Bai et al. introduced graphene nanomesh (GNM) structures which can open the band gap of large area graphene at room temperature with high current. However, this method is complex and only small area is possible. For practical applications, it needs more simple and large scale process. Herein, we introduce a photosensitive graphene device fabrication using CdSe QD coated nano-porous graphene (NPG). In our experiment, NPG was fabricated by thin film anodic aluminum oxide (AAO) film as an etching mask. First of all, we transfer the AAO on the graphene. And then, we etch the graphene using O2 reactive ion etching (RIE). Finally, we fabricate graphene device thorough photolithography process. We can control the length of NPG neckwidth from AAO pore widening time and RIE etching time. And we can increase size of NPG as large as 2 $cm^2$. Thin CdSe QD layer was deposited by spin coatingprocess. We carried out NPG structure by using field emission scanning electron microscopy (FE-SEM). And device measurements were done by Keithley 4200 SCS with 532 nm laser beam (5 mW) irradiation.