• Journal of the Semiconductor & Display Technology
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• v.8 no.2
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• pp.1-10
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• 2009

This study describes the electron beam lithography pattern fabrication using the proximity effect correction. When electron beam exposes into electron beam resist, the beam tends to spread inside the substance (forward scattering). And the electron beam reflected from substrate spreads again (back scattering). These two effects influence to distribution of the energy and give rise to a proximity effect while a small pattern is generated. In this article, an electron energy distribution is modeled using Gaussian shaped beam distribution and those parameters in the model are computed to solidify the model. The proximity effect is analyzed through simulations and appropriate corrections to reducing the proximity effect are suggested. It is found that the proximate effect can be reduced by adopting schemes of dose adjustment, and the optimal dose is determined through simulations. The proposed corrected proximity effect correction is proved by experiments.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.76-82
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• 1998

As the minimum feature size of a semiconductor chip gets smaller, the inevitable distortion of patterned image by optical lithography becomes the limiting factor in the mass production of VLSI. The optical proximity correction (OPC), which corrects pattern distortion that originates from the resolution limit of optical lithography, is becoming indispensable technology. In this paper, we describe a program that corrects optical proximity effect and thus finds the optimum mask pattern with a Monte-Carlo method. The program was applied to real memory cell patterns to produce mask patterns that generate image patterns closer to object images than original mask patterns, and increase of process margin is expected, as well.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.2
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• pp.100-105
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• 2004

The influencing factors on the OPC (optical proximity correction) results are quantitatively analyzed using OPCed L/S patterns. ${\sigma}$ values of proximity variations are measured to be 9.3 nm and 15.2 nm for PR-A and PR-B, respectively. The effect of post exposure bake condition is assessed. 16.2 nm and 13.8 nm of variations are observed. Proximity variations of 11.6 nm and 15.2 nm are measured by changing the illumination condition. In order not to seriously deteriorate the OPC, these factors should be fixed after the OPC rules are extracted. Proximity variations of 11.4, 13.9, and 15.2 nm are observed for the mask mean-to-targets of 0, 2 and 4 nm, respectively. The decrease the OPC grid size from 1 nm to 0.5 nm enhances the correction resolution and the OCV is reduced from 14.6 nm to 11.4 nm. The enhancement amount of proximity variations are 9.2 nm corresponding to 39% improvement. The critical dimension (CD) uniformity improvement for adopting the small grid size is confirmed by measuring the CD uniformity on real SRAM pattern. CD uniformities are measured 9.9 nm and 8.7 nm for grid size of 1 nm and 0.5 nm, respectively. 22% improvement of the CD uniformity is achieved. The decrease of OPC grid size is shown to improve not only the proximity correction, but also the uniformity.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.11
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• pp.901-907
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• 2000

As the minimum feature size for making ULSI approaches the wavelength of light source in optical lithography, the aerial image is so hardly distorted because of the optical proximity effect that the accurate mask image reconstruction on wafer surface is almost impossible. We applied the Optical Proximity Correction(OPC) on isolated patterns assuming Attenuated Phase Shift Mask(APSM) as well as binary mask, to correct the widening of isolated patterns. In this study, we found that applying OPC to APSM shows much better improvement not only in enhancing the resolution and fidelity of t도 images but also in enhancing the process margin than applying OPC to the binary mask. Also, we propose the OPC method of APSM for isolated patterns, the size of which is less than the wavelength of the ArF excimer laser. Finally, we predicted the resolution limit of optical lithography through the aerial image simulation.

• Journal of the Optical Society of Korea
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• v.16 no.3
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• pp.221-227
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• 2012

We propose optical proximity corrections (OPCs) for digital micromirror device (DMD)-based maskless lithography. A pattern writing scheme is analyzed and a theoretical model for obtaining the dose distribution profile and resulting structure is derived. By using simulation based on this model we were able to reduce the edge placement error (EPE) between the design width and the critical dimension (CD) of a fabricated photoresist, which enables improvement of the CD. Moreover, by experiments carried out with the parameter derived from the writing scheme, we minimized the corner-rounding effect by controlling light transmission to the corners of a feature by modulating a DMD.

• Proceedings of the Optical Society of Korea Conference
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• 2006.07a
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• pp.225-226
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• 2006

• Proceedings of the KAIS Fall Conference
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• 2002.05a
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• pp.106-108
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• 2002

반도체 physical layout design rule이 작아짐에 따라 Proximity effect와 overlay가 Pattern 구현에 크게 영향을 미치고 있다. Metal layer와 contact의 부족한 overlay margin으로 overlay 불량이 발생하고, 감소한 space margin으로 인해 bridge와 같은 문제가 나타난다. 따라서, resolution을 향상시키고, 최소한의 overlay margin을 확보함으로써 미세 pattern의 구현을 가능하게 한다. 이를 위해 OPC와 attPSM 같은 분해능향상기술이 사용된다. 그러나 attPSM의 사용은 원하지 않는 pattern이 생성되는 sidelobe와 같은 문제가 발생한다. 따라서 serial image simulation올 통해 추출한 rule을 rule-based correction에 적용하여 sidelobe현상을 방지한다. 그리고 overlay margin 부족으로 나타나는 문제는 metal layer와 contact overlap되는 영역의 line edge를 확장하고, rule checking을 통해 최소한의 space margin을 확보하여 해결한다 따라서 overlay error를 rule-based correction을 사용하여 효과적으로 방지한다.

• Wind and Structures
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• v.13 no.1
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• pp.21-36
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• 2010

A new full scale testing apparatus generically named the Wall of Wind (WoW) has been built by the researchers at the International Hurricane Research Center (IHRC) at Florida International University (FIU). WoW is capable of testing single story building models subjected up to category 3 hurricane wind speeds. Depending on the relative model and WoW wind field sizes, testing may entail blockage issues. In addition, the proximity of the test building to the wind simulator may also affect the aerodynamic data. This study focuses on the Computational Fluid Dynamics (CFD) assessment of the effects on the quality of the aerodynamic data of (i) blockage due to model buildings of various sizes and (ii) wind simulator proximity for various distances between the wind simulator and the test building. The test buildings were assumed to have simple parallelepiped shapes. The computer simulations were performed under both finite WoW wind-field conditions and in an extended Atmospheric Boundary Layer (ABL) wind flow. Mean pressure coefficients for the roof and the windward and leeward walls served as measures of the blockage and wind simulator proximity effects. The study uses the commercial software FLUENT with Reynolds Averaged Navier Stokes equations and a Renormalization Group (RNG) k-${\varepsilon}$ turbulence model. The results indicated that for larger size test specimens (i.e. for cases where the height of test specimen is larger than one third of the wind field height) blockage correction may become necessary. The test specimen should also be placed at a distance greater than twice the height of the test specimen from the fans to reduce proximity effect.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2002.11a
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• pp.349-354
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• 2002

A size of low-voltage conductor cables is determined by the voltage drop of a system, the cable impedance and the cable ampacity based on temperature correction factor in accordance with the condition of cable installation. Therefore, the proper temperature correction factor according to the condition of cable installation should be applied to determining the cable ampacity and also the skin effect and proximity effect, along with the kind and size of conductor and the condition of cable installation, should be properly considered to analyze the proper value of resistance and the reactance of the conductors. This paper addresses the systematic design flow for determining the size of low voltage level conductor cables in calculating the temperature character where error should be minimized in comparison with the general formula and which can be applied in design work for determining the size of conductor cables.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.3
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• pp.84-92
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• 2002

A size of low-voltage conductor cables is determined by the voltage drop of a system the cable impedance and the cable ampacity based on temperature correction factor in accordance with the condition of cable installation. Therefore, the proper temperation correction factor according to the condition of cable installation should be applied to determining the cable ampacity and also the skin effect and proximity effect, along with the kind and size of conductor and the condition of cable installation, should be properly considered to analyze the proper value of resistance and the reactance of the conductors. This paper addresses the systematic design flow for determining the size of low voltage level con여ctor cables in calculating the voltage drop of a power system and proposes a new improved the calculating formula what error should be minimized in comparison with the general formula and which can be applied in design work for determining the size of conductor cables.