• ETRI Journal
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• v.25 no.6
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• pp.475-488
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• 2003

In this paper, we propose an efficient and simple fair queuing algorithm, called new starting potential fair queuing (NSPFQ), which has O(1) complexity for virtual time computation and also has good delay and fairness properties. NSPFQ introduces a simpler virtual time recalibration method as it follows a rate-proportional property. The NSPFQ algorithm recalibrates the system virtual time to the minimum virtual start time among all possible virtual start times for head-of-line packets in backlogged sessions. Through analysis and simulation, we show that the proposed algorithm has good delay and fairness properties. We also propose a hardware implementation framework for the scheduling algorithm.

• Proceedings of the KOSOMBE Conference
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• v.1990 no.05
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• pp.67-71
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• 1990

This paper is dedicated to a research on fluorescent temperature-sensor system, which analyses the characteristic of fluorescent material and observes the relation between temperature and time delay of reflected beam from red light through experiment. From the experiment, We know that the reflected be am from flourescent material has some time delay. The intensity of reflected beam is inversly proportional to the temperature around the material.

• Journal of Communications and Networks
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• v.11 no.5
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• pp.464-472
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• 2009

In this paper, we propose a packet scheduling algorithm for cellular relay networks by considering relay selection, variation of channel quality, and packet delay. In the networks, mobile users are equipped with not only cellular but also user relaying radio interfaces, where base station exploits adaptive high speed downlink channel. Our proposed algorithm selects a user with good cellular channel condition as a relay station for other users with bad cellular channel condition but can get access to relay link with good quality. This can achieve flexible packet scheduling by adjusting transmission rates of cellular link. Packets are scheduled for transmission depending on scheduling indexes which are calculated based on user's achieved transmission rate, packet utility, and proportional fairness of their throughput. The performance results obtained by using computer simulation show that the proposed scheduling algorithm is able to achieve high network capacity, low packet loss, and good fairness in terms of received throughput of mobile users.

• Journal of Institute of Control, Robotics and Systems
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• v.16 no.1
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• pp.77-82
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• 2010

An analytical method for robust design of the multi-loop proportional-integral (PI) controller is proposed for various types of multi-delay processes. On the basis of the direct synthesis and generalized IMC-PID approach, the analytical tuning rules of the multi-loop PI controller are firstly derived for achieving the desired closed-loop response, and the structured singular value synthesis is then utilized for the tradeoffs between the robust stability and performance by adjusting only one design parameter (i.e., the closed-loop time constant). To verify the superiority of the proposed method, the simulation studies have been conducted on a wide variety of multivariable processes. The multi-loop PI controller designed by the proposed method shows a fast, well-balanced and robust response with the minimum integral absolute error (IAE) in compared with other renowned methods.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.181-184
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• 2017

This study analyzes the turn-on and turn-off transients of a metal-oxide-semiconductor field-effect transistor (MOSFET) with high-switching frequency systems. In these systems, the voltage distortion becomes serious at the output terminal of a Vienna rectifier by the turn-off delay of the MOSFET. The current has low-order harmonics through this voltage distortion. This paper describes the transient of the turn-off that causes the voltage distortion. The algorithm for reducing the sixth harmonic using a proportional-resonance controller is proposed to improve the current distortion without complex calculation for compensation. The reduction of the current distortion by high-switching frequency is verified by experiment with the 2.5-kW prototype Vienna rectifier.

• Proceedings of the KIEE Conference
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• 1999.11c
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• pp.621-624
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• 1999

In this paper, we propose the non-contact method to measure rotational speed vector using spatial filtering method. The rotational speed $\omega$ is known by the frequency of output sinusoidal signal direct proportional to that and the rotational direction is given by the phase delay from the weighting function design of spatial filter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.2
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• pp.306-321
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• 1994

Since TDM protocol can be easily implemented and show high throughput at heavy load, the researches on the multi-channel high-speed network based on TDM access control have been getting more attention than ever. TDM type multi-channel network, however, has disadvantages of excessive delay at light load and inadaptibility to traffic skewing. In this paper, we proposed a new multi-channel TDM structure, time slots are allocated proportional to the traffic flow pattern among the nodes. thus delay and throughput performance are improved. Design principles of TDM frame are discussed considering traffic locality and the number of available channels. Approximate analytic models for delay evaluation are developed and verified by simulations.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.5
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• pp.967-973
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• 2009

Recently, as 3rd-generation mobile communication services using high-speed data rate system are widely employed, the demand for a variety of real-time data services such as VoIP service are also increased. Unlike typical data packets, VoIP packets have delay bound and low loss rate requirement. In this paper we propose a new scheduling algorithm that schedule two deferent kinds of packets efficiently, considering the characteristics of VoIP. Basically this algorithm considers both time delay and channel condition and gives priority depending on the time delay. Simulation results show that the proposed algorithm works more efficiently than conventional algorithms.

• Journal of Biomedical Engineering Research
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• v.11 no.1
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• pp.147-156
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• 1990

A two-dimensional pulsed doppler system for ultrasonic blood velocity doppler signals is studied and implemented. The second-order sampling method and serial data processing procedures are utillized in the sys- tem, which eliminates the untuning problems at phase channels in the quadrature detection method as well as in the channels of parallel data processing. rho digital signal processor used in this system allows a hardware savings and flexible design options. The efficiency of the various mean frequency estimators in the second-order sampling system is examined by computer simulation as a function of the intersequence sample delay time. The temporal delay for the quadrature component is changed from $1/(4f_o){\;}to{\;}3/(4f_o){\;}and{\;}5/(4f_o)$ where to is the center frequency of the transducer, It is found that autocorrelator is the optimum frequency estimator for the second-order sampling: with !he intersequence sample delay of $1/(4f_o){\;}to{\;}3/(4f_o){\;}and{\;}5/(4f_o)$. The qualitative variation and information proportional to blood velocity in the vessel system are obtained in the VIVO experiments.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.7
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• pp.17-22
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• 2012

A novel Clock Generator with jitter suppressed delay-locked loop (DLL) has been proposed to generate highly accurate output signals. The proposed Clock Generator has a VCDL which can suppress its jitter by generating control signals proportional to phase differences among delay stages. It has been designed to generate 1GHz output at 100MHz input with 1.8V $0.18{\mu}m$ CMOS process. The simulation result demonstrates a 3.24ps of peak-to-peak jitter.