• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.6
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• pp.225-236
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• 2003

In this paper, we propose a wireless scheduling algorithm to provide the Internet delay proportional differentiated services in wireless networks. For considering network environments that have burst and location-dependent channel errors, our proposed WDPS(Wireless Delay Proportional Service) scheduling algorithm adaptively serves packets in class queues based on the delivered delay performance for each class. The remarkable characteristics of WDPS scheduler are supporting a fair relative delay service, providing graceful throughput and delay compensation, and avoiding class queue blocking problem. Through simulations, we show that the algorithm achieves the desirable properties to provide delay proportional services in wireless networks.

• ETRI Journal
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• v.22 no.3
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• pp.1-9
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• 2000

Self-Clocked Fair Queueing (SCFQ) algorithm has been considered as an attractive packet scheduling algorithm because of its implementation simplicity, but it has unbounded delay property in some input traffic conditions. In this paper, we propose a Rate Proportional SCFQ (RP-SCFQ) algorithm which is a rate proportional version of SCFQ. If any fair queueing algorithm can be categorized into the rate proportional class and input is constrained by a leaky bucket, its delay is bounded and the same as that of Weighted Fair Queueing (WFQ) which is known as an optimal fair queueing algorithm. RP-SCFQ calculates the timestamps of packets arriving during the transmission of a packet using the current value of system potential updated at every packet departing instant and uses a starting potential when it updates the system potential. By doing so, RP-SCFQ can have the rate proportional property. RP-SCFQ is appropriate for high-speed packet-switched networks since its implementation complexity is low while it guarantees the bounded delay even in the worst-case input traffic conditions.

• ETRI Journal
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• v.30 no.2
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• pp.227-237
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• 2008

In this paper, an algorithm that provides absolute and proportional differentiation of packet delays is proposed with the objective of enhancing quality of service in future packet networks. It features an adaptive scheme that adjusts the target delay for every time slot to compensate the deviation from the target delay, which is caused by prediction error on the traffic to arrive at the next time slot. It predicts the traffic to arrive at the beginning of a time slot and measures the actual arrived traffic at the end of the time slot. The difference between them is utilized by the delay control operation for the next time slot to offset it. Because the proposed algorithm compensates the prediction error continuously, it shows superior adaptability to bursty traffic and exponential traffic. Through simulations we demonstrate that the algorithm meets the quantitative delay bounds and is robust to traffic fluctuation in comparison with the conventional non-adaptive mechanism. The algorithm is implemented with VHDL on a Xilinx Spartan XC3S1500 FPGA, and the performance is verified under the test board based on the XPC860P CPU.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.6B
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• pp.586-592
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• 2002

In this paper, new channel scheduling algorithms which reduce transmission delay caused by wireless network are proposed in AMC/TDM wireless data communication. The concept of the Proposed algorithms is based on the proportional fairness, M-LWDF, and performance-guaranteeing algorithm proposed by Xin Liu. The proposed algorithm can be applied to QoS guaranteeing services as well as best-effort services. Simulation results show that new algorithm reduced transmission delay upto 11.5% in case of proportional fairness algorithm and also decreased transmission delay unto 9% in case of M-LWBF algorithm.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.49 no.7
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• pp.345-349
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• 2000

This paper presents an extended integral control with the PI controller by introducing the delay and decaying factors. The extended integral control scheme is developed by substituting the proportional convolution integral control for the PI(Proportional Integral) control. So far, the integral part of PI controller produces a signal that is proportional to the time integral of the input signal to the controller. The steady-state operation points are affected forever by errors in the past due to the input signal containing the information of the error in the past. These phenomena may cause some disturbances for other control purposes related to the given PI control. Introduction of forgetting factors to the error in the past can resolve the disturbance problems. Various forgetting factors are developed using the delay elements, the decaying factors, and the combination of the delay and decaying factors. The proposed various extended integral control schemes can be applicable to the corresponding PI control designs in which the error in the past may badly affect the current steady-state operation points and may cause some disturbances for other control purposes.

• Bulletin of the Korean Mathematical Society
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• v.39 no.2
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• pp.225-236
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• 2002

By means of the method of majorant series, sufficient conditions are obtained for the existence of analytic solutions of a functional differential equation with proportional delays.

• Journal of Internet Computing and Services
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• v.5 no.6
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• pp.11-20
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• 2004

Proportional Fair (PF) share policy has been adopted as a downlink scheduling scheme in CDMA2000 l×EV-DO standard. Although It offers optimal performance in aggregate throughput conditioned on equal time share among users, it cannot provide a bandwidth guarantee and a strict delay bound. which is essential requirements of real-time (RT) applications. In this study, we propose a new scheduling policy that provides quality-of-service (QoS) guarantees to a variety of traffic types demanding diverse service requirements. In our policy data traffic is categorized Into three classes, depending on sensitivity of Its performance to delay or throughput. And the primary components of our policy, namely, Proportional Fair (PF), Weighted Fair Queuing (WFQ), and delay-based prioritized scheme are intelligently combined to satisfy QoS requirements of each traffic type. In our policy all the traffic categories run on the PF policy as a basis. However the level of emphasis on each of those ingredient policies is changed in an adaptive manner by taking into account the channel conditions and QoS requirements. Such flexibility of our proposed policy leads to offering QoS guarantees effectively and. at the same time, maximizing the throughput. Simulations are used to verify the performance of the proposed scheduling policy. Experimental results show that our proposal can provide guaranteed throughput and maximum delay bound more efficiently compared to other policies.

• Convergence Security Journal
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• v.7 no.2
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• pp.17-25
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• 2007

In this paper, an algorithm that provisions proportional differentiation of packet delays is proposed with an objective for enhancing quality of service (QoS) in future packet networks. It features an adaptive scheme that adjusts the target delay every time slot to compensate the deviation from the target delay which is caused by the prediction error on the traffic to be arrived in the next time slot. It predicts the traffic to be arrived at the beginning of a time slot and measures the actual arrived traffic at the end of the time slot. The difference between them is utilized to the delay control operation for the next time slot to offset it. As it compensates the prediction error continuously, it shows superior adaptability to the bursty traffic as well as the exponential rate traffic. It is demonstrated through simulations that the algorithm meets the quantitative delay bounds and shows superiority to the traffic fluctuation in comparison with the conventional non-adaptive mechanism. The algorithm is implemented with VHDL on a Xilinx Spartan XC3S1500 FPGA and the performance is verified under the test board based on the XPC860P CPU.

• Proceedings of the KIEE Conference
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• 1999.07c
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• pp.1063-1066
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• 1999

This paper presents an extended integral control with the PID controller by introducing the delay and decaying factors. The convolution integral control scheme is developed by substituting proportional convolution integral controls for the proportional-integral control. So far, the integral part of the PI controller produces a signal that is proportional to the time integral of the input of the controller. The steady-state operation points are affected forever by the errors in the past due to the input signal containing the information of the errors in the past. These phenomina may cause some disturbances for other control purposes related to the given PI control. Introduction of forgetting factors of the error in the past can resolve the disturbance problems. Various forgetting factors are developed using the delay, the decaying factors, and the combination of the delay and the decaying factors. The proposed various extended integral control schemes can be applicable to corresponding PI control designs in which the error in the past may badly affect to the current steady-state operation points and may cause some disturbances for other control purposes.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1053-1056
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• 2008

The effects of wall charge and bias voltage on exo-electron emission currents were examined. In addition, the effects of doping elements on the currents were investigated. These results indicated that the statistical delay is inversely proportional to the exo-electron emission currents measured.