• Title/Summary/Keyword: programmable controller

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A Design and Implementation of Industrial Fluid Monitoring System (산업공정상의 유체 유동 모니터링 시스템 설계 및 구현)

  • Lee, Won-Joo;Lee, Sang-Jun
    • Journal of the Korea Society of Computer and Information
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    • v.15 no.4
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    • pp.99-106
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    • 2010
  • In this paper, we propose an industrial fluid monitoring system which performs the flow control function and monitors fluid pressure transmitted from MFC(Mass Flow Controller) unit. This system consists of MFC unit, channel device, and monitoring management software. MFC unit transmits the measured data of the fluid pressure to the channel device which would provide the input/output interface between management software, monitoring and MFC unit. The monitoring and management software control and analyze by monitoring real time measurements of fluid pressure from each channel of MFC unit. This software can process 20 channels and 0.1 monitoring cycle which gives 200 data measurement per second (i.e., 720,000 data/hour). At this time, the storage space increases in proportion to the rise of input data. This growth of data and storage space makes loss of data access efficiency. Therefore, it demands the implementation by sensing scheme of change scope and data, which can effectively manage the data.

Implementation of Main Computation Board for Safety Improvement of railway system (철도시스템의 안전성 향상을 위한 주연산보드 구현)

  • Park, Joo-Yul;Kim, Hyo-Sang;Lee, Joon-Hwan;Kim, Bong-Taek;Chung, Ki-Seok
    • Proceedings of the KSR Conference
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    • 2011.05a
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    • pp.1195-1201
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    • 2011
  • Since the release of safety standard IEC 61508 which defines functional safety of electronic safety-related systems, SIL(Safety Integrity Level) certification for railway systems has gained lots of attention lately. In this paper, we propose a new design technique of the computer board for train control systems with high reliability and safety. The board is designed with TMR(Triple Modular Redundancy) using a certified SIL3 Texas Instrument(TI)'s TMS570 MCU(Micro-Controller Unit) to guarantee safety and reliability. TMR for the control device is implemented on FPGA(Field Programmable Gate Array) which integrates a comparator, a CAN(Controller Area Network) communication module, built-in self-error checking, error discriminant function to improve the reliability of the board. Even if a malfunction of a processing module occurs, the safety control function based on the proposed technique lets the system operate properly by detecting and masking the malfunction. An RTOS (Real Time Operation System) called FreeRTOS is ported on the board so that reliable and stable operation and convenient software development can be provided.

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Implementation of Fuzzy Self-Tuning PID and Feed-Forward Design for High-Performance Motion Control System

  • Thinh, Ngo Ha Quang;Kim, Won-Ho
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.14 no.2
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    • pp.136-144
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    • 2014
  • The existing conventional motion controller does not perform well in the presence of nonlinear properties, uncertain factors, and servo lag phenomena of industrial actuators. Hence, a feasible and effective fuzzy self-tuning proportional integral derivative (PID) and feed-forward control scheme is introduced to overcome these problems. In this design, a fuzzy tuner is used to tune the PID parameters resulting in the rejection of the disturbance, which achieves better performance. Then, both velocity and acceleration feed-forward units are added to considerably reduce the tracking error due to servo lag. To verify the capability and effectiveness of the proposed control scheme, the hardware configuration includes digital signal processing (DSP) which plays the main role, dual-port RAM (DPRAM) to guarantee rapid and reliable communication with the host, field-programmable gate array (FPGA) to handle the task of the address decoder and receive the feed-back encoder signal, and several peripheral logic circuits. The results from the experiments show that the proposed motion controller has a smooth profile, with high tracking precision and real-time performance, which are applicable in various manufacturing fields.

Application of the Laser Vision Sensor for Corrugated Type Workpiece

  • Lee, Ji-Hyoung;Kim, Jae-Gwon;Kim, Jeom-Gu;Park, In-Wan;Kim, Hyung-Shik
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.499-503
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    • 2004
  • This application-oriented paper describes an automated welding carriage system to weld a thin corrugated workpiece with welding seam tracking function. Hyundai Heavy Industries Corporation has developed an automatic welding carriage system, which utilizes pulsed plasma arc welding process for corrugated sheets. It can obtain high speed welding more than 2 times faster than traditional TIG based welding system. The aim of this development is to increase the productivity by using automatic plasma welding carriage systems, to track weld seam line using vision sensor automatically, and finally to provide a convenience to operator in order to carry out welding. In this paper a robust image processing and a distance based tracking algorithms are introduced for corrugated workpiece welding. The automatic welding carriage system is controlled by the programmable logic controller(PLC), and the automatic welding seam tracking system is controlled by the industrial personal computer(IPC) equipped with embedded OS. The system was tested at actual workpiece to show the feasibility and performance of proposed algorithm and to confirm the reliability of developed controller.

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The design of a 32-bit Microprocessor for a Sequence Control using an Application Specification Integrated Circuit(ASIC) (ICEIC'04)

  • Oh Yang
    • Proceedings of the IEEK Conference
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    • 2004.08c
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    • pp.486-490
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    • 2004
  • Programmable logic controller (PLC) is widely used in manufacturing system or process control. This paper presents the design of a 32-bit microprocessor for a sequence control using an Application Specification Integrated Circuit (ASIC). The 32-bit microprocessor was designed by a VHDL with top down method; the program memory was separated from the data memory for high speed execution of 274 specified sequence instructions. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. And in order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 32-bits. And the real time debugging as single step run, break point run was implemented. Pulse instruction, step controller, master controllers, BIN and BCD type arithmetic instructions, barrel shit instructions were implemented for many used in PLC system. The designed microprocessor was synthesized by the S1L50000 series which contains 70,000 gates with 0.65um technology of SEIKO EPSON. Finally, the benchmark was performed to show that designed 32-bit microprocessor has better performance than Q4A PLC of Mitsubishi Corporation.

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The Design of High Speed Processor for a Sequence Logic Control using FPGA (FPGA를 이용한 시퀀스 로직 제어용 고속 프로세서 설계)

  • Yang, Oh
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.12
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    • pp.1554-1563
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    • 1999
  • This paper presents the design of high speed processor for a sequence logic control using field programmable gate array(FPGA). The sequence logic controller is widely used for automating a variety of industrial plants. The FPGA designed by VHDL consists of program and data memory interface block, input and output block, instruction fetch and decoder block, register and ALU block, program counter block, debug control block respectively. Dedicated clock inputs in the FPGA were used for high speed execution, and also the program memory was separated from the data memory for high speed execution of the sequence instructions at 40 MHz clock. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 16 bits or 32 bits respectively. And the real time debug operation was implemented for easy debugging the designed processor. This FPGA was synthesized by pASIC 2 SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to sequence control system with inputs and outputs of 256 points. The designed processor for the sequence logic was compared with the control system using the DSP(TM320C32-40MHz) and conventional PLC system. The designed processor for the sequence logic showed good performance.

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Cutting Force Regulation in Milling Process Using Sliding Mode Control (슬라이딩 모드 제어기를 이용한 밀링공정의 절삭력 제어)

  • Lee, Sang-Jo;Lee, Yong-Seok;Go, Jeong-Han
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.25 no.8
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    • pp.1173-1182
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    • 2001
  • Recent noticeable advances of CNC machine tools have considerably improved productivity and precision in manufacturing processes. However, in the respect of productivity some defects still remain because selection of machining conditions entirely depends on the experiences of programmers. Usually, machining conditions such as feed rate and spindle speed have been selected conservatively by considering the worst cases, and it has brought the loss of machining efficiency. Thus, the improvement of cutting force controller has been done to regulate cutting force constantly and to maximize feedrate simultaneously in case that machining conditions change variously. In this study, sliding mode control with boundary layer is applied to milling process for cutting force regulation and in a commercial CNC machining center data transfer between PC and PMC (programmable machine controller) of CNC machine is done using a standard interface method. And in the cutting force measurement, an indirect cutting force measuring system using current signal of AC servo is adopted in order not to use high-priced equipment like tool dynamometer. The purpose of this study is to maximize the productivity in milling process, thus its results can be applied to cases such as rough cutting process.

A Fully Synthesizable Bluetooth Baseband Module for a System-on-a-Chip

  • Chun, Ik-Jae;Kim, Bo-Gwan;Park, In-Cheol
    • ETRI Journal
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    • v.25 no.5
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    • pp.328-336
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    • 2003
  • Bluetooth is a specification for short-range wireless communication using the 2.4 GHz ISM band. It emphasizes low complexity, low power, and low cost. This paper describes an area-efficient digital baseband module for wireless technology. For area-efficiency, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware-efficient functions, such as low-level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB)interfaces; and audio Codec are performed by dedicated hardware blocks. Furthermore, we eliminate FIFOs for data buffering between hardware functional units. The design is done using fully synthesizable Verilog HDL to enhance the portability between process technologies so that our module can be easily integrated as an intellectual property core no system-on-a-chip (SoC) ASICs. A field programmable gate array (FPGA) prototype of this module was tested for functional verification and realtime operation of file and bitstream transfers between PCs. The module was fabricated in a $0.25-{\mu}m$ CMOS technology, the core size of which was only 2.79 $mm{\times}2.80mm$.

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on-line Modeling of Nonlinear Process Systems using the Adaptive Fuzzy-neural Networks (적응퍼지-뉴럴네트워크를 이용한 비선형 공정의 온-라인 모델링)

  • 오성권;박병준;박춘성
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.10
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    • pp.1293-1302
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    • 1999
  • In this paper, an on-line process scheme is presented for implementation of a intelligent on-line modeling of nonlinear complex system. The proposed on-line process scheme is composed of FNN-based model algorithm and PLC-based simulator, Here, an adaptive fuzzy-neural networks and HCM(Hard C-Means) clustering method are used as an intelligent identification algorithm for on-line modeling. The adaptive fuzzy-neural networks consists of two distinct modifiable sturctures such as the premise and the consequence part. The parameters of two structures are adapted by a combined hybrid learning algorithm of gradient decent method and least square method. Also we design an interface S/W between PLC(Proguammable Logic Controller) and main PC computer, and construct a monitoring and control simulator for real process system. Accordingly the on-line identification algorithm and interface S/W are used to obtain the on-line FNN model structure and to accomplish the on-line modeling. And using some I/O data gathered partly in the field(plant), computer simulation is carried out to evaluate the performance of FNN model structure generated by the on-line identification algorithm. This simulation results show that the proposed technique can produce the optimal fuzzy model with higher accuracy and feasibility than other works achieved previously.

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Implementation and Design of Digital Instruments System using FPGA (FPGA를 이용한 디지털 계측 시스템의 설계 및 구현)

  • Choi, Hyun Jun;Jang, Seok Woo
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.9 no.2
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    • pp.55-61
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    • 2013
  • A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC) (circuit diagrams were previously used to specify the configuration, as they were for ASICs, but this is increasingly rare). Contemporary FPGAs have large resources of logic gates and RAM blocks to implement complex digital computations. In this paper, we implement a system of digital instrumentation using FPGA. This system consists of the trigger part, memory address controller part, control FSM part, Encoder part, LCD controller part. The hardware implement using FPGA and the verification of the operation is done in a PC simulation. The proposed hardware was mapped into Cyclone III EP2C5Q208 from Altera and used 1,700(40%) of Logic Element (LE). The implemented circuit used 24,576-bit memory element with 6-bit input signal. The result from implementing in hardware (FPGA) could operate stably in 140MHz.