• Title/Summary/Keyword: program code size

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Real-Time Functional Reactive Program Translator for Embedded Systems (임베디드 시스템을 위한 실시간 함수형 반응적 프로그램 변환기)

  • Lee, Dong-Ju;Woo, Gyun
    • The KIPS Transactions:PartA
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    • v.13A no.6 s.103
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    • pp.481-488
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    • 2006
  • FRP(Functional Reactive Programming) is a kind of embedded language in Haskell, it declaratively program reactive system based on two essential high-order types named behavior and events. This Paper design and implementation RT-FRP(Real-time Functional Reactive Programming) translator for using FRP in embedded systems with many constraints. The RT-FRP translator generates a C Program from an RT-FRP program according to the operational semantics of the RT-FRP language. To show the effectiveness of the RT-FRP translator, we loaded and executed the test program generated by the translator onto a real embedded system, LEGO Mindstorm. According to the experimental result, the reactive system software can be programmed more concisely using RT-FRP than using an imperative counter part although the size of the binary code is rather increased.

The design of a 32-bit Microprocessor for a Sequence Control using an Application Specification Integrated Circuit(ASIC) (ICEIC'04)

  • Oh Yang
    • Proceedings of the IEEK Conference
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    • 2004.08c
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    • pp.486-490
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    • 2004
  • Programmable logic controller (PLC) is widely used in manufacturing system or process control. This paper presents the design of a 32-bit microprocessor for a sequence control using an Application Specification Integrated Circuit (ASIC). The 32-bit microprocessor was designed by a VHDL with top down method; the program memory was separated from the data memory for high speed execution of 274 specified sequence instructions. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. And in order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 32-bits. And the real time debugging as single step run, break point run was implemented. Pulse instruction, step controller, master controllers, BIN and BCD type arithmetic instructions, barrel shit instructions were implemented for many used in PLC system. The designed microprocessor was synthesized by the S1L50000 series which contains 70,000 gates with 0.65um technology of SEIKO EPSON. Finally, the benchmark was performed to show that designed 32-bit microprocessor has better performance than Q4A PLC of Mitsubishi Corporation.

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Efficiency Measurement Method and Simplification of Program (프로그램의 효율성 측정 방법과 간소화)

  • Yang, Hae-Sool
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.1
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    • pp.49-62
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    • 1998
  • Softwares which have many functions to satisfy user's requirements is developing. But generally, users use partial functions of software. If we could construct software which leave useful functions and remove unuseful functions in software with many functions, we could enhance execution efficiency by reduction of program size and quality of software. There are 6 items in international standard ISO/IEC 9126 about quality of software. These are functionality, reliability, usability, efficiency, maintenance and portability. In this study, we proposed metrics for measurement of efficiency and simplification method for source code. And we described products evaluation result and indicated problem and progress method for practical development project about proposed efficiency metrics.

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Development of a Small Centrifugal Fan with CFD (수치해석에 의한 소형 원심팬 개발)

  • Chee, Seon-Koo;Park, Sung-Kwan
    • 유체기계공업학회:학술대회논문집
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    • 2001.11a
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    • pp.11-16
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    • 2001
  • It is not easy to apply a small-sized centrifugal fan to the duct used for the thermal management of home electronic appliances due to complex design parameters of its blades and scroll. The main objective of this study was to develop the systematic process to design an optimal centrifugal fan based on the 3-dimensional configuration of blades obtained from the conceptual design program self-developed with the given design constraints such as the flow rate, the total pressure loss, the size of fan, and the number of rotation. The design process to find an optimal centrifugal fan for refrigerator was technologically linked in many ways. The complex grid generation system of the fan model included scroll was adopted for the numerical simulation. The FVM CFD code, FLUENT, was used to investigate the three dimensional flow pattern at the coordinate system of rotating frame and to check the optimal performance of the fan. By using this design process, a selected centrifugal fan was designed, numerically simulated, manufactured and experimentally tested in the wind tunnel. The performance curve of fan manufactured by NC process was compared with numerically obtained characteristic curve. The developed design method was proved into being excellent because these two curves were well matched.

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Study on Section Properties of Deckplates with Flat-Hat Stiffners (Flat-Hat 스티프너를 가진 데크플레이트의 단면 성능에 관한 연구)

  • Ju, Gi-Su;Park, Sung-Moo
    • Journal of Korean Association for Spatial Structures
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    • v.4 no.1 s.11
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    • pp.77-86
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    • 2004
  • It is the buckling of the compression portions of the deckplate that govern its behaviour under wet concrete construction loading. The size and position of intermediate stiffeners in the compression flanges of thin-plate steel decks exert a strong influence on the dominant buckling mode of the flange. Test sections composed of high-strength steel were brake pressed with a variety of Flat-hat intermediate stiffeners in the compression flange forming a progression from small to large stiffeners. The ABAQUS program to determine the effectiveness of intermediate stiffeners in controlling buckling modes is undertaken. A series of specimens are loaded with simple beam. Various buckling wave forms prior to ultimate failure through a plastic collapse mechanism. The experimentally determined buckling stresses are found to be comparable with studies performed using the ABAQUS program analysis and using each country code.

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Development and evaluation of punching shear database for flat slab-column connections without shear reinforcement

  • Derogar, Shahram;Ince, Ceren;Mandal, Parthasarathi
    • Structural Engineering and Mechanics
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    • v.66 no.2
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    • pp.203-215
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    • 2018
  • A large body of experiments have been conducted to date to evaluate the punching shear strength of flat slab-column connections, but it is noted that only a few of them have been considered for the development of the ACI Code provisions. The limited test results used for the development of the code provisions fall short of predicting accurately the punching shear strength of such connections. In an effort to address this shortfall and to gain an insight into the factors that control the punching shear strength of flat slab-column connections, we report a qualified database of 650 punching shear test results in this article. All slabs examined in this database were tested under gravity loading and do not contain shear reinforcement. In order to justify including any test result for evaluation punching shear database, we have developed an approved set of criteria. Carefully established set of criteria represent the actual characteristics of structures that include minimum compressive strength, effective depths of slab, flexural and compression reinforcement ratio and column size. The key parameters that significantly affect the punching shear strength of flat slab-column connections are then examined using ACI 318-14 expression. The results reported here have paramount significance on the range of applicability of the ACI Code provision and seem to indicate that the ACI provisions do not sufficiently capture many trends identified through regression of the principal parameters, and fall on the unsafe side for the prediction of the punching shear strength of flat slab-column connections.

ANALYSIS OF TMI-2 BENCHMARK PROBLEM USING MAAP4.03 CODE

  • Yoo, Jae-Sik;Suh, Kune-Yull
    • Nuclear Engineering and Technology
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    • v.41 no.7
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    • pp.945-952
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    • 2009
  • The Three Mile Island Unit 2 (TMI-2) accident provides unique full scale data, thus providing opportunities to check the capability of codes to model overall plant behavior and to perform a spectrum of sensitivity and uncertainty calculations. As part of the TMI-2 analysis benchmark exercise sponsored by the Organization for Economic Cooperation and Development Nuclear Energy Agency (OECD NEA), several member countries are continuing to improve their system analysis codes using the TMI-2 data. The Republic of Korea joined this benchmark exercise in November 2005. Seoul National University has analyzed the TMI-2 accident as well as the currently proposed alternative scenario along with a sensitivity study using the Modular Accident Analysis Program Version 4.03 (MAAP4.03) code in collaboration with the Korea Hydro and Nuclear Power Company. Two input files are required to simulate the TMI-2 accident with MAAP4: the parameter file and an input deck. The user inputs various parameters, such as volumes or masses, for each component. The parameter file contains the information on TMI-2 relevant to the plant geometry, system performance, controls, and initial conditions used to perform these benchmark calculations. The input deck defines the operator actions and boundary conditions during the course of the accident. The TMI-2 accident analysis provided good estimates of the accident output data compared with the OECD TMI-2 standard reference. The alternative scenario has proposed the initial event as a loss of main feed water and a small break on the hot leg. Analysis is in progress along with a sensitivity study concerning the break size and elevation.

Separation characteristics of particles in a self-rotating type centrifugal oil purifier

  • Pyo, Young-Seok;Jung, Ho-Yun;Choi, Yoon-Hwan;Doh, Deog-Hee;Lee, Yeon-Won
    • Journal of Advanced Marine Engineering and Technology
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    • v.38 no.2
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    • pp.147-153
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    • 2014
  • The centrifugal oil purifier is used in an engine for lubrication and to remove impurities. The momentum needed for the rotation of the cylindrical chamber is obtained by jet injections. An impure particle in the oil is separated by the centrifugal forces moving to the inner wall of the rotating cylindrical chamber body. The dust particles are eliminated when the particles are absorbed onto the surface of the inner wall of the chamber body. The flow characteristics and the physical behaviors of particles in this centrifugal oil purifier were investigated numerically and the filtration efficiencies was evaluated. For calculations, a commercial code is used and the SST (Shear Stress Transport) turbulence model has been adopted. The MFR (Multi Frames of Reference) method is introduced to consider the rotating effect of the flows. Under various variables, such as particle size, particle density and rotating speed, the filtration efficiencies are evaluated. It has been verified that the filtration efficiency is increased with the increments in the particle size, the particle density and the rotating speed of the cylindrical chamber.

Implementation of HMM-Based Speech Recognizer Using TMS320C6711 DSP

  • Bae Hyojoon;Jung Sungyun;Son Jongmok;Kwon Hongseok;Kim Siho;Bae Keunsung
    • Proceedings of the IEEK Conference
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    • summer
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    • pp.391-394
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    • 2004
  • This paper focuses on the DSP implementation of an HMM-based speech recognizer that can handle several hundred words of vocabulary size as well as speaker independency. First, we develop an HMM-based speech recognition system on the PC that operates on the frame basis with parallel processing of feature extraction and Viterbi decoding to make the processing delay as small as possible. Many techniques such as linear discriminant analysis, state-based Gaussian selection, and phonetic tied mixture model are employed for reduction of computational burden and memory size. The system is then properly optimized and compiled on the TMS320C6711 DSP for real-time operation. The implemented system uses 486kbytes of memory for data and acoustic models, and 24.5kbytes for program code. Maximum required time of 29.2ms for processing a frame of 32ms of speech validates real-time operation of the implemented system.

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Design and Implementation of Firmware for Low-cost Small PCR Devices (저가의 소형 PCR 장치를 위한 펌웨어 설계 및 구현)

  • Lee, Wan Yeon;Kim, Jong Dae
    • Journal of the Korea Society of Computer and Information
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    • v.18 no.6
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    • pp.1-8
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    • 2013
  • In this paper, we design and implement a firmware for low-cost small PCR devices. To minimize machine code size, the proposed firmware controls real-time tasks simultaneously only with support of the hardware interrupt, but without support of the operating system program. The proposed firmware has the host-local structure in which the firmware receives operation commands from PC and sends operation results to PC through usb communication. We implement a low-cost small PCR device with the proposed firmware loaded on microchip PIC18F4550 chip, and verify that the implemented PCR device significantly reduces cost and volume size of existing commercial PCR devices with a similar performance.