• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.8
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• pp.33-41
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• 1998

We have designed a high speed and low power 16bit-ELM adder with variable-sized cells uitlizing the fact that the logic depth of lower bit position is less than that of the higher bit position int he conventional ELM architecture. As a result of HSPICE simulation with 0.8.mu.m single-poly double-metal LG CMOS process parameter, out 16bit-ELM adder with variable-sized cells shows the reduction of power-delay-product, which is less than that of the conventional 16bit-ELM adder with reference-sized cells by 19.3%. We optimized the desin with various logic styles including static CMOs, pass-transistor logic and Wang's XOR/XNOR gate. Maximum delay path of an ELM adder depends on the implementation method of S cells and their logic style.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.27 no.8
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• pp.1409-1417
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• 2003

In the 21st century, the concept of remote design and manufacture is strongly required in manufacturing processes to reduce cost and time-to-market. The objective of this paper is the development of an internet-based dimensional verification system for reverse engineering. An inspection client can register measurement data at the developed web server. Collaborators related to the development of a new product can confirm geometrical form from measurement data, check dimensional information and mark up the important parts, as well as make a statement of their views through the Internet. The developed system is realized through the ActiveX-Server architecture. Functions of the dimensional verification module are constructed as ActiveX by using the visual C＋＋ and OpenGL. The usefulness of the developed system is confirmed through a case study.

• KSBB Journal
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• v.29 no.4
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• pp.271-277
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• 2014

In this study, crude extract of the seagrass Zostera japonica, and its solvent-partitioned fractions were evaluated for their antioxidant activity. The crude extract was successively fractionated into n-hexane, 85% aqueous methanol (85% aq.MeOH), n-butanol (n-BuOH), and water fractions by liquid-liquid partition. These include DPPH radical scavenging, hydroxyl radical scavenging in HT-1080 cells, peroxynitrite scavenging, and protective effect on DNA damage caused by hydroxyl radicals generated. In all assays, except for DPPH radical, 85% aq.MeOH and n-BuOH fraction showed the strong antioxidant activity. These results suggest that Z. japonica may be used as a potential source of natural antioxidants for the development of cosmetic product or functional food in the future.

• Smart Media Journal
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• v.3 no.4
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• pp.9-15
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• 2014

A virtual platform models a processor core and the peripheral devices constituting the SoC in software. Major companies utilize a variety of platforms for product development with optimal SW+SoC integrated system architecture design and IP reuse based Top-Down design flow using a virtual platform. In this paper, we propose a virtual platform based on OpenRISC, an open source RISC based core. The proposed virtual platform supports high speed emulation of approximately 20 MIPS using DBT (Dynamic Binary Translation).

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.291-292
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• 2006

Currently A demand of high precision workpiece is increasing in industry. At present, roundness measuring machine using Air bearing, coordinate measuring machine that are used from measurement station. but these machines will not be able to apply to In-line process. because of like these machine's price are very expensive and measurement time is long. also, the complexity of conventional roundness measurement method based on fourier transform, it makes difficult to development analysis program. This work present new architecture of a Out-diameter measuring system fur analysis of roundness of product. In this system, the influence of table motion errors is minimize by using two LVDT sensor and knife edge contact tip. We are produce a test machine and make an experimenter on Out-diameter of test bearing. The measurement result compared with roundness measuring machine.

• Proceedings of the KIEE Conference
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• 1990.07a
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• pp.521-524
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• 1990

There is an increasing interest in high-speed signal processing in modern telecommunication and consumer electronics applications. HDTV, ISDN. A limiting factor in Op-Amp based analog integrated circuits is the limited useful frequency range. This research program will develop a new CMOS Op-Amp architecture with improved gainband width product. The new design CMOS Op-Amp will achieve up to 100MHz unity gainband width with a 1.5-micron design rule.

• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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• v.19 no.1
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• pp.77-83
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• 2001

To product the map by terrestrial photogrammetry method, a few rather nuisance stereo image acquiring processing and plot using expensive analytical instruments have to be performed. In this study, plot was made by acquiring and rectification image using simple method rather than above it. For this, geometry rectification system was constructed for the generation of single ortho-image analysis. and these ortho-images of architecture were made and analysed by appling various warping methods. As a result, the performance of single image analysis could be estimated, and it is expected that the application of this is possible to various non-topographic photogrammetry.

• Design & Manufacturing
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• v.2 no.4
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• pp.24-31
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• 2008

The productive products are required diversification of product development and advanced for competitiveness. A lot of methods to fix architecture wrapping panels and stone materials are developed in domestic area very much. In this paper, it is very important that a fixing device of slate and molds were developed to reduce the production cost and improve safety. Therefore new model was suggested to reduce manufacturing cost and structure design and FEM analysis were performed to manufacture die press dies for mass production.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• v.20 no.4
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• pp.277-293
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• 2016

We develop an efficient numerical method for pricing the Derivative Linked Securities (DLS). The payoff structure of the hybrid DLS consists with a standard 2-Star step-down type ELS and the range accrual product which depends on the number of days in the coupon period that the index stay within the pre-determined range. We assume that the 2-dimensional Geometric Brownian Motion (GBM) as the model of two equities and a no-arbitrage interest model (One-factor Hull and White interest rate model) as a model for the interest rate. In this study, we employ the Monte Carlo simulation method with the Compute Unified Device Architecture (CUDA) parallel computing as the General Purpose computing on Graphic Processing Unit (GPGPU) technology for fast and efficient numerical valuation of DLS. Comparing the Monte Carlo method with single CPU computation or MPI implementation, the result of Monte Carlo simulation with CUDA parallel computing produces higher performance.

• ETRI Journal
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• v.34 no.2
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• pp.256-259
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• 2012

The double-base number system has been used in digital signal processing systems for over a decade because of its fast inner product operation and low hardware complexity. This letter proposes an innovative multiplier architecture using hybrid operands. The multiplier can easily be linked to flash analog-to-digital converters or digital systems through a double-base number encoder (DBNE) for realtime signal processing. The design of the DBNE and the multiplier enable faster digital signal processing and require less hardware resources compared to the binary processing method.