• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.589-592
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• 2002

A CMOS power amplifier for IMT-2000 is designed with 0.25-${\mu}m$ CMOS technology. This amplifier circuits consist of two cascode stages. Used cascode structure has good reverse isolation. These amplifier circuits consist of two stages which are driver stage and power amplification stage. The designed power amplifier is simulated with ADS using 0.25-${\mu}m$ CMOS library at 3.3 V power supply. Simulation results indicate that the amplifier has a PAE of 39 % and power gain of 24 dBm at 1.95 GHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.10
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• pp.43-46
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• 2012

In this paper, high efficiency power amplifier is implemented with high gain amplifier. Two-stage amplifier using adaptive bias control circuit improve efficiency at low input power. Fixed bias circuit and adaptive bias circuit both have about 76 % efficiency at maximum power level. However amplifier using an adaptive bias control circuit has 70 % at 6 dBm input power level when the amplifier using fixed bias circuit has 50%. The proposed power amplifier using the adaptive bias control circuit can have high efficiency at lower power level.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.22 no.2
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• pp.170-178
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• 2012

This paper is concerned with the development of power amplifier and controller for piezoelectric actuator and sensor used in smart structures. Even though a high-voltage power amplifier is provided in the form of an operational amplifier, a very high DC voltage is still necessary as a power supply. In this study, we propose a low-cost design for the power amplifier including the DC power supply. We also need a controller on which a control algorithm will be mounted. In general, a digital signal processing chip is popularly used because of high speed. However, only commercial product is available for smart structure applications. In this paper, a controller consisting of a DSP and electronic circuits suitable for piezoelectric sensor and actuator pair is proposed. To validate the proposed controller with power amplifier, experiment on smart structure was carried out. The experimental results show that the proposed control system can be effectively used for smart structure applications with low cost.

• ETRI Journal
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• v.34 no.6
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• pp.885-891
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• 2012

This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-${\mu}m$ RF-CMOS process with a supply voltage of 3.3 V. The measured gain, $P_{1dB}$, and efficiency at $P_{1dB}$ are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained.

• Journal of Advanced Navigation Technology
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• v.13 no.3
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• pp.358-364
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• 2009

This paper shows some variable bias techniques which can improve the power added efficiency(PAE) for the designed power amplifier. Some simulations have been done to get the effect of the bias change, and variable bias is adopted to get the higher efficiency for dual mode amplifier which generates two different output power levels. With drain bias change and a fixed gate bias, the amplifier shows PAE improvement compared to the fixed bias amplifier. In addition, this paper analyzed nonlinear distortion of the power amplifier and has used the digital predistortion which can result in 10dB ACPR improvement for the dual band amplifier.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.687-694
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• 2016

A differential power amplifier operating at millimeter-wave frequencies is demonstrated using a 65-nm CMOS technology. All of the input, output, and inter-stage network are implemented by transformers only, enabling impedance matching with low loss and a wide bandwidth. The millimeter-wave power amplifier exhibits measured small-signal gain exceeding 12.6 dB over a 3-dB bandwidth from 45 to 56 GHz. The output power and PAE are 13 dBm and 11.7%, respectively at 50 GHz.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.2
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• pp.195-199
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• 2006

A wideband power amplifier for a frequency hopping radio unit is designed. To obtain higher efficiency, it is designed for the Class B mode overdrived. The broadband transformer and feedback circuits are adapted to obtain broadband characteristics. The designed amplifier is simulated using the ADS, which is a CAD software from HPEEsof, Simulation results of the designed amplifier are well suited for the design specifications. The designed amplifier are fabricated. Measured results of the fabricated amplifier well agreed with the simulation results and are in good agreement with the predicted performance.

• Journal of Advanced Navigation Technology
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• v.21 no.6
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• pp.626-632
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• 2017

This paper describes a high power amplifier combining eight low power amplifiers using a radial power combiner with low insertion loss. The radial power combiner is a non-resonant type combiner with 8 input ports and is implemented by microstrip transmission line. The combiner characteristics designed at operating frequency of 1.045 GHz have an insertion loss of 0.7 dB and a return loss of more than 12 dB. Also, the low power amplifier used was designed with AFT27S010NT1 transistor and designed to satisfy the same gain, phase and constant output characteristic at operating frequency. The high power amplifier, which combiners the radial power combiner and the drive amplifier of 8 W output by driving low power amplifiers obtained the output characteristic of 33 W at operating frequency of 1.045 GHz. Also, the change of the output characteristic of the amplifier using the radial combiner was graceful degradation when the low power amplifier failed one by one.

• Journal of Advanced Navigation Technology
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• v.24 no.2
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• pp.107-114
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• 2020

A power amplifier of 2.4 GHz ISM band is designed to implement a transmitter system. High efficiency amplifiers can be implemented as class E or class F amplifiers. This study has designed a 20 W high efficiency class E amplifier that has simple circuit structure in order to utilize for the ISM band application. The impedance matching circuit was designed by class E design theory and circuit simulation. The designed amplifier has the output power of 44.2 dBm and the power added efficiency of 69% at 2.45 GHz. In order to apply 30 dBm input power to the designed power amplifier, voltage controlled oscillator (VCO) and driving amplifier have been fabricated for the input feeding circuit. The measurement of the power amplifier shows 43.2 dBm output and 65% power added efficiency. This study can be applied to the design of power amplifiers for various wireless communication systems such as wireless power transfer, radio jamming device and high power transmitter.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.1
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• pp.13-20
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• 2015

Existing LDMOS power amplifier that used class-AB and doherty system shows 55% of efficiency in 60MHz narrow band. Because RRH has been applied to power amplifier at base station. It is required that over 100MHz expanded band and more than 60% high efficiency power amplifier. In this paper we designed class-J power amplifier using LDMOS FET which has over 60% high efficiency characteristic in 200MHz. The output matching circuit of designed class-J power amplifier has been optimized to contain pure reactance at second harmonic load and has low quality factor Q. As a measurement result of the amplifier, when we input continuous wave signal, we checked 62~70% of power added efficiency(PAE) in 2.06~2.2GHz including WCDMA frequency as a 10W class-J power amplifier.