• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.3A
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• pp.356-359
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• 2006

A monolithic SiGe HBT variable gain driver amplifier(VGDA) with high dB-linear gain control and high linearity has been developed as a driver amplifier with ground-shielded microstrip lines for 5-GHz transmitters. The VGDA consists of three blocks such as the cascode gain-control stage, fixed-gain output stage, and voltage control block. The circuit elements were optimized by using the Agilent Technologies' ADSs. The VGDA was implemented in STMicroelectronics' 0.35${\mu}m$ Si-BiCMOS process. The VGDA exhibits a dynamic gain control range of 34 dB with the control voltage range from 0 to 2.3 V in 5.15-5.35 GHz band. At 5.15 GHz, maximum gain and attenuation are 10.5 dB and -23.6 dB, respectively. The amplifier also produces a 1-dB gain-compression output power of -3 dBm and output third-order intercept point of 7.5 dBm. Input/output voltage standing wave ratios of the VGDA keep low and constant despite change in the gain-control voltage.

• Journal of Navigation and Port Research
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• v.27 no.4
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• pp.437-441
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• 2003

In this paper, the 30 W power amplifier for an IMT-2000 repeater was developed a gain flatness and the third IMD (Intermodulation distortion) by microwave absorber. The absorption ability of the absorber is shown up to -10 dB and -4 dB at 3.6 GHz, 2.3 GHz band, respectively. The power amplifier without absorber has the gain over 57 dB, the gain flatness of $\pm$0.33 dB and the third IMD of 27 dBc at 33.3 W output. Otherwise, the power amplifier with absorber has the gain over 58 dB, the gain flatness of less than $\pm$0.9, the third IMD over 29 dBc at the same output power. As a result, the characteristic of the different type shows improvement of 1 dB in gain, 0.3 dB in gain flatness and 1.77 dBc in IMD.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.4
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• pp.321-328
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• 2008

In this paper, variable gain amplifier(VGA) with a gain slope controller has been proposed and verified by circuit simulations and measurements. The proposed VGA has a gain control, gain slope switch and variable gain range. The input source coupled pair with diode connected load is used for VGA gain stage. The gain slope controller with switch can control VGA gain slope. The proposed VGA is fabricated in $0.18{\mu}m$ CMOS process for multi -standard wireless receiver. The proposed two stage VGA consumes min. 2.0 mW to max. 2.6 mW in gain control range and gives input IP3 of -3.77 dBm and NF of 28.7 dB at 1.8 V power supply under -25 dBm, 1 MHz input. The proposed VGA has 37 dB(-16 dB $\sim$ 21 dB) variable gain range, and 8 dB gain range control per 0.3 V control voltage, and can provide variable gain, positive and negative gain slope control, and gain range control. This VGA characteristics provide design flexibility in multi-standard wireless receiver.

• Journal of Power Electronics
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• v.14 no.1
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• pp.82-91
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• 2014

This paper proposes a compensation algorithm for the analog rotor position errors caused by nonideal sinusoidal encoder output signals including offset and gain errors. In order to achieve a much higher resolution, position sensors such as resolvers or incremental encoders can be replaced by sinusoidal encoders. In practice, however, the periodic ripples related to the analog rotor position are generated by the offset and gain errors between the sine and cosine output signals of sinusoidal encoders. In this paper, the effects of offset and gain errors are easily analyzed by applying the concept of a rotating coordinate system based on the dq transformation method. The synchronous d-axis signal component is used directly to detect the amplitude of the offset and gain errors for the proposed compensator. As a result, the offset and gain errors can be well corrected by three integrators located on the synchronous d-axis component. In addition, the proposed algorithm does not require any additional hardware and can be easily implemented by a simple integral operation. The effectiveness of the proposed algorithm is verified through several experimental results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.3A
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• pp.160-167
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• 2005

The gain-clamped EDFA has been developed to eliminate the output power change of WDM surviving channels to occur with added or dropped channels, which degrades the performance of WDM optical network. It maintains the constant gain of surviving channels when WDM channels are added or dropped in a network amplifying node. In this paper, the hi-directionally pumped gain-clamped EDFA is implemented to compensate the change of the input power by a lasing. The results show that the lasing of a short wavelength and backward propagation is the optimal condition to minimize the transient response of surviving channels in terms of the overshoot and gain saturation due to the inhomogeneous broadening effect.

• Journal of electromagnetic engineering and science
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• v.3 no.2
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• pp.111-117
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• 2003

We propose a diode-based RF pre-distorter with various gain and phase characteristics, for non-linearity compensation of RF power amplifiers. This pre-distorter results in the removal of the diode- and configuration-dependent characteristics in the conventional diode-based RF pre-distorters. We have analyzed the operation principle of the proposed pre-distorter. The results show that gain and phase characteristics of the pre-distorter in all four quadrants are achieved. Several power amplifiers and test signals are used for verifying the performance of the proposed diode-based RF pre-distorter.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.3
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• pp.168-173
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• 2004

A low power CMOS receiver baseband analog circuit based on alternating filter and gain stage is reported. For the given specifications of the baseband analog block, optimum allocation of the gain, IIP3 and NF of the each block was performed to minimize current consumption. The fully integrated receiver BBA chain is fabricated in $0.18\;{\mu}m$ CMOS technology and IIP3 of 30 dBm with a gain of 55 dB and noise figure of 31 dB are obtained at 4.86 mW power consumption.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.4
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• pp.377-387
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• 2012

An intrinsic small signal equivalent circuit model of Cylindrical/Surrounded gate MOSFET is proposed. Admittance parameters of the device are extracted from circuit analysis and intrinsic circuit elements are presented in terms of real and imaginary parts of the admittance parameters. S parameters are then evaluated and justified with the simulated data extracted from 3D device simulation.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.449-451
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• 2008

This paper studies the instability between homopolar generator and constant power load with negative impedance characteristics, provides the design method of homopolar generator system which overcomes the instability. In case of magnitude and phase of impedance of source and load mismatch, control instability of source can occur. For the safety of phase of load impedance, the gain of P, I controller with sufficient phase margin is applied through analysis on the simulation model of generator system, and the gain limit of load impedance is ensured by limitation of the gain margin of generator system. The stability of power system can be increased by considering and analyzing the impedance of source and load.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1046-1049
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• 2002

In this paper, a sub-harmonic dual-gate FET mixer for IMT-2000 base-station was designed by using single-gate FET cascode structure and driven by the second order harmonic component of LO signal. The dual-gate FET mixer has the characteristic of high conversion gain and good isolation between ports. Sub-harmonic mixing is frequently used to extend RF bandwidth for fixed LO frequency or to make LO frequency lower. Furthermore, the LO-to-RF isolation characteristic of a sub-harmonic mixer is better than that of a fundamental mixer because the frequency separation between the RE and LO frequency is large. As RF power is -30dBm and LO power is 0dBm, the designed mixer shows the -47.17dBm LO-to-RF leakage power level, 10dB conversion gain, -0.5dBm OIP3, -10.5dBm IIP3 and -1dBm 1dB gain compression point.