• Journal of Electrical Engineering and Technology
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• 제12권3호
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• pp.1156-1165
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• 2017

A high performance interleaved bridgeless boost power factor correction (PFC) rectifier operating under the critical current conduction mode (CrM) is proposed in this paper to improve the efficiency and system performance of various applications, such as nano-grid systems. By combining the interleaved technique with the bridgeless topology, the circuit contains two independent branches without rectifier diodes. The branches operate in interleaved mode for each respective half-line period. Moreover, when operating in CrM, all the power switches take on soft-switching, thereby reducing switching losses and raising system efficiency. In addition, the input current flows through a minimum amount of power devices. By employing a commercial PFC controller, an effective control scheme is used for the proposed circuit. The operating principle of the proposed circuit is presented, and the design considerations are also demonstrated. Simulations and experiments have been carried out to evaluate theoretical analysis and feasibility of the proposed circuit.

• Journal of Power Electronics
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• 제19권1호
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• pp.278-287
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• 2019

In this study, a zero-crossing spike current issue in a totem-pole bridgeless power factor correction (PFC) converter is comprehensively investigated for the first time. Spike current occurs when input voltage crosses zero, becomes a noise source, and causes severe common mode emission issues. A generation mechanism for electromagnetic interference (EMI) is presented to investigate the EMI problem caused by zero-crossing issue, and a noise spectrum due to this issue is predicted by a theoretical analysis based on the Fourier coefficient of an approximate spike current waveform. Furthermore, a noise reduction method is proposed and then improved to reduce the spike current. Experimental measurements are implemented on a GaN-based totem-pole bridgeless PFC converter, and the spike current can be effectively suppressed through the proposed method. Furthermore, the noise spectrums measured without and with the reduced zero-crossing spike current are compared. Experimental results validate the analysis of the noise spectrum caused by the zero-crossing spike current issue.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.50-55
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• 1998

This paper introduces the advantages of zero voltage transition(ZVT) boost converter for power factor correction and analyzes the control method of ZVT with IC UC3855. Practical design issues which include the components selection and design procedure are discussed. The experimental results are given.

• 전력전자학회논문지
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• 제10권3호
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• pp.211-218
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• 2005

SRM은 간단하면서 견고한 전동기 구조. 넓은 속도범위에 걸쳐 고효율, 탁월한 제어성능 등을 가지고 있다. 그러나 SRM의 전원부에는 일반적으로 다이오드 정류기를 사용하고 정류기의 출력단에 평활용 커패시터를 사용한다. 따라서 입력전류 파형은 폭이 좁은 펄스형태의 전류를 발생하게 되며 많은 고조파의 성분을 포함하여 제어시스템의 오동작을 발생하게 되는 원인이 된다. 본 논문에서는 energy-efficient C-dump 컨버터의 입력 전원부에 승압형 컨버터를 연결하여 고조파 성분을 저감하여 역률을 개선하는 구동시스템에 관하여 연구하였다. SRM제어를 위해 저 가격의 원칩 80C196KC와 각도제어를 위해 EPROM을 이용하였다. 시뮬레이션과 실험을 통하여 제안된 시스템의 역률 개선을 확인하였다.

• 전력전자학회논문지
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• 제22권1호
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• pp.27-35
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• 2017

In this study, an integrated 2-in-1 transformer for a low-weight and low-cost light-emitting diode lighting power supply is proposed. In the transformer, a power factor correction (PFC) inductor and an LLC resonant transformer are placed and integrated on a single magnetic core. The amount of mutual interference, represented by the coupling coefficient, between magnetic fluxes generated from each magnetic source is minimized by using the new shape core of an integrated 2-in-1 transformer. The design consideration on critical conduction mode PFC converter and LLC resonant converter using the proposed 2-in-1 integrated transformer is described, and the overall performance of the 150 W LED PSU shown through the experiment.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2005년도 춘계학술대회논문집
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• pp.106-110
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• 2005

In this paper, LED traffic signal lamp's operating circuit using Flyback converter and PFC IC has been presented. Most power conversion circuits use PFC IC for Power Factor Correction. The design parameter's value of Flyback converter has been proposed and the error amplifier which regulates the output voltage has been designed Besides, the under voltage protection circuit and the over voltage protection circuit for protecting the operating circuit kin unbalance of common electric power source and the temperature compensation circuit for fixed optical output power have been proposed.

• Journal of Power Electronics
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• 제14권4호
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• pp.641-648
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• 2014

This paper presents the design considerations and analysis for an interleaved boundary conduction mode power factor correction buck converter. A thorough analysis of the harmonic content of the AC line current is presented to examine the allowable voltage gain (K value) for meeting the EN61000-3-2, Class D standard while maximizing efficiency. The results of the harmonic analysis are used to derive the required value of K and therefore the output voltage necessary to meet the class D requirements for a given AC line voltage. The discussed design consideration and harmonic current analysis are verified on a 300W universal line experimental prototype converter with an 80V output. The measured efficiencies remain above 96% down to 20% of the full load. The input current harmonics also meet the IEC61000-3-2 (class D) standard.

• Journal of Power Electronics
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• 제8권2호
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• pp.192-199
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• 2008

This paper is mainly concerned with a high frequency soft-switching PWM inverter suitable for consumer induction heating systems. The proposed system is composed of a soft switching chopper based boost PFC converter stage with passive snubber and phase shifted PWM controlled full bridge ZVZCS high frequency inverter stage. Its fundamental operating performances are illustrated and evaluated in the experimental results. Its effectiveness is substantially proved on the basis of the experimental results from a practical point of view.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1997년도 전력전자학술대회 논문집
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• pp.247-250
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• 1997

A novel zero-voltage-switching(ZVS) isolated PWM converter for single stage power factor correction (PFC) is presented to improve the performance of the previously presented ZVT converter[5]. A simple clamp circuit in the primary side provides zero-voltage-switching condition to all semiconductor devices. This ZVS is achieved with minimum device voltage and current stresses. Operation principle, control strategy and features of the proposed converter are presented and verified by the experimental results from a 1.5 ㎾, 100 KHz laboratory prototype

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.993-997
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• 1998

This paper presents a two-switch boost chopper with a sinewave current shaping and power factor correction scheme, which is applied for driving electronic ballast using high frequency resonant inverter. A working principle of the proposed one-converter type electronic ballast with power factor correction and active filtering schemes is described on the bases of the equivalent circuit of each operation mode, together with operation analysis. The steady-state performance evaluations of this electronic ballast are illustrated and discussed in experiment.