• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.5 no.3
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• pp.22-35
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• 1994

To improve the bandwidth efficiency in the environment of digital mobile communications, a correlative coded FM system is designed. The signal of this system has continuous phase and high power efficiency due to the constant envelope. But this signal also has a little loss of the SNR and some degradation of the BER. In this paper, a modified MLSE method which uses correlative coded signal is adopted to improve the performance of the receiver. The MLSE method improved the BER performance in the used channel. Without the decision feedback, the receiver performance was improved by 2dB and with it, by 4dB Particularly, the MLSE method and the decision feedback showed better performance in bad channels than in a stable telephone channel.

• Journal of information and communication convergence engineering
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• v.8 no.6
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• pp.655-659
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• 2010

In the conventional PNC scheme, the relay node requires simultaneous transmission of two source nodes with strict power control and carrier-phase matching between two received symbols. However, this pre-equalization process at source nodes is not practical in fading channels. In this letter, we propose a novel physical-layer network coding (PNC) scheme with log-likelihood ratio (LLR) conversion for fading channels, which utilizes not pre-equalizer at transmitters (source nodes) but joint detector at receiver (relay node). The proposed PNC requires only channel side information at the receiver (CSIR), which is far more practical assumption in fading channels. In addition, the proposed PNC scheme can use the conventional modulation scheme like M-QAM regardless of modulation order, while the conventional PNC scheme requires reconfiguration of modulation scheme at the source nodes for detection of the received signal at relay node. We consider the combination of the proposed PNC and channel coding, and find that the proposed PNC scheme is easily combined the linear channel codes such as turbo codes, LDPC, and convolutional codes.

• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.422-423
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• 2010

직렬 연결된 배터리는 각 셀의 내부 화학적 특성 차이로 인해 동일 전류로 충전 및 방전 과정을 진행하여도 셀 간에 미세한 전압 차이가 발생한다. 이러한 셀 간 전압 불균형은 배터리 셀에 해로운 영향을 끼치게 되는데, 2차 전지의 경우 배터리 용량의 변화를 야기한다. 이러한 문제를 해결하기 위해서 배터리 운용 범위를 제한하는 보호회로가 있지만 보호회로는 직렬 연결된 배터리 셀 중 가장 전압이 높거나 가장 낮은 셀을 기준으로 충전과 방전 사이클을 종료시키므로 배터리 팩의 용량을 최대한으로 사용하지 못하게 하는 문제를 발생시킨다. 배터리 균등화 회로는 셀 간의 전압 차이를 줄여 배터리의 최대 용량을 사용하고자 하는 목적을 가진다. 저항을 기반으로 하는 수동적인 방법과는 달리 스위칭 소자를 이용하는 능동적인 방법에서는 스위칭으로 인해 입출력 전압 변동이 발생하여 컨버터 내부에 흐르는 전류가 수시로 변하는 문제가 생긴다. 위 문제를 해결하기 위한 방법으로 본 논문에서는 배터리 균등화 회로에 전하 제어(Charge control)기법을 제안하고, 그에 따른 회로 설계 요소를 제시한다.

• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.224-225
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• 2010

직렬로 연결된 리튬 이온 배터리의 안전성을 보장하고 배터리 수명을 늘리기 위해서 셀 전하 균일 회로가 필요하다. 하지만 기존의 전하 균일 회로의 경우 셀 전압을 알아내기 위한 셀 전압 센싱모듈이 필요하게 되고 이는 가격이나 부피적인 측면에서 불리하게 되며, 만약 셀 전압 센싱 모듈을 제거 할 경우 전하 균일 성능이 크게 떨어지게 된다. 본 논문에서는 배터리 팩의 평균전압과 동일한 크기를 가지는 정류된 전압원을 이용한 자동 전하 균일 회로를 제안한다. 제안하는 자동 전하 균일 회로는 양방향 DC/DC 컨버터와 주기적이고 반복적으로 셀 선택을 하는 스위칭 블록을 이용하여 셀 전압 센싱모듈 없이도 우수한 전하 균일을 가능하도록 한다. 그리고 제안된 회로의 동작원리를 설명하고, 8셀 배터리 모듈을 이용한 실험을 통하여 회로의 동작을 검증하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.2
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• pp.158-165
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• 2000

In this paper, the transmission channels of L-band and Ka-band multi-media satellite communication systems for the land mobile satellite(LMS) communication service are modeled. Trellis coded(TC) 8PSK is proposed as a power and bandwidth efficient digital transmission scheme for the LMS system, and its error probability performance is analyzed. Block interleaving and deinterleaving are applied to the transmitter and receiver of LMS system respectively in order to compensate for the BER performance degradation of TC-8PSK caused by multipath fading. Viterbi equalizer is also employed in the receiver for channel equalization, and the corresponding BER performance improvement is analyzed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.1C
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• pp.113-119
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• 2009

The training sequence with the appropriate length for equalization and initial synchronization is necessary before sending the pure data in the burst transmission type DS-UWB system. The length of the training sequence is one of the factors which make throughput decreased. The noble structure with the variable length of the training sequence whose length can be adaptively tailored according to the channel conditions (CM1,CM2,CM3,CM4) in the DS-USB systems is proposed. This structure can increase the throughput without sacrificing the performance than the method with fixed length of training sequence considering the worst case channel conditions. Simulation results under IEEE 802.15.3a channel model show that the proposed scheme can achieve higher throughput than a conventional one with the slight loss of BER performance. And this structure can reduce the computation complexity and power consumption with selecting the short length of the training sequence.

• Journal of Satellite, Information and Communications
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• v.5 no.1
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• pp.6-16
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• 2010

Since OFDM system suffers from high peak-to average power ratio(PAPR) drawbacks, more energy has been converted to seek for a new substitutable system which can maintain OFDM system's inherent virtues while avoid its defects. Consequently, a new multicarrier system called as CI/OFDM system has been proposed which applied carrier interferometry(CI) code to OFDM system. Due to its low PAPR advantage and orthogonal property, it has received more and more attention. Simultaneously, an old technique called single carrier(SC) system has retaken its attractions for the same purposes. This paper analyzes two cyclic prefixed transmission schemes variants of OFDM system: 1.carrier interferometry-Orthogonal Frequency-Division Multiplexing (CI/OFDM); 2. Cyclic prefixed single carrie(CP-SC) with frequency domain equalization. We compare the achievable bit rate transmission of the two systems in terms of signal to noise ratio(SNR) by mathematical derivation. We demonstrated that CI/OFDM achieves a bit higher transmission bit rate to that of the CP-SC with frequency domain equalizer.

• Proceedings of the KIPE Conference
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• 2015.11a
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• pp.7-8
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• 2015

In this paper a cell-to-cell fast charge balancing circuit for the Lithium-Ion battery module is proposed. In the proposed topology the energy in a high voltage cell is transferred directly to a low voltage cell through the operation of the dc-dc converter. Furthermore, the charge balancing can be performed regardless of the battery operation whether it is being charged, discharged or relaxed. The monitoring circuit composed of a DSP and a battery monitoring IC is designed to monitor the cell voltage and detect the inferior cell thereby protecting the battery module from failure. In order to demonstrate the performance of the proposed topology, a prototype circuit was designed and applied to 12 Lithium-Ion battery module. It has been verified with the experiments that the charge equalization time of the proposed method was shorter compared with those of other methods.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.4 no.1
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• pp.25-44
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• 2010

With the increasing popularity of mobile devices, it has become necessary to protect private information and content in these devices. Face recognition has been favored over conventional passwords or security keys, because it can be easily implemented using a built-in camera, while providing user convenience. However, because mobile devices can be used both indoors and outdoors, there can be many illumination changes, which can reduce the accuracy of face recognition. Therefore, we propose a new face recognition method on a mobile device robust to illumination variations. This research makes the following four original contributions. First, we compared the performance of face recognition with illumination variations on mobile devices for several illumination normalization procedures suitable for mobile devices with low processing power. These include the Retinex filter, histogram equalization and histogram stretching. Second, we compared the performance for global and local methods of face recognition such as PCA (Principal Component Analysis), LNMF (Local Non-negative Matrix Factorization) and LBP (Local Binary Pattern) using an integer-based kernel suitable for mobile devices having low processing power. Third, the characteristics of each method according to the illumination va iations are analyzed. Fourth, we use two matching scores for several methods of illumination normalization, Retinex and histogram stretching, which show the best and $2^{nd}$ best performances, respectively. These are used as the inputs of an SVM (Support Vector Machine) classifier, which can increase the accuracy of face recognition. Experimental results with two databases (data collected by a mobile device and the AR database) showed that the accuracy of face recognition achieved by the proposed method was superior to that of other methods.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.11-20
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• 1998

High-speed complex-number arithmetic units are essential to baseband signal processing of modern digital communication systems such as channel equalization, timing recovery, modulation and demodulation. In this paper, a new complex-number multiplication algorithm is proposed, which is based on redundant binary (RB) arithmetic combined with radix-4 Booth recoding scheme. The proposed algorithm reduces the number of partial product by one-half as compared with the conventional direct method using real-number multipliers and adders. It also leads to a highly parallel architecture and simplified circuit, resulting in high-speed operation and low power dissipation. To demonstrate the proposed algorithm, a prototype complex-number multiplier-accumulator (CMAC) core with 10-bit operands has been designed using 0.8-$\mu\textrm{m}$ N-Well CMOS technology. The designed CMAC core contains about 18,000 transistors on the area of about 1.60 ${\times}$ 1.93 $\textrm{mm}^2$. The functional and speed test results show that it can operate with 120-MHz clock at V$\sub$DD/=3.3-V, and its power consumption is given to about 63-mW.