• Proceedings of the KIPE Conference
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• 2004.11a
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• pp.32-36
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• 2004

In order to achieve high performance vector control, it is essential to measure accurate ac current. The errors generated from current path are inevitable, and they could be divided into two categories: offset error and scaling error. The current data including these errors cause periodic speed ripples which are one and two times of stator electrical frequency respectively. Since these undesirable ripples bring about bad influences to motor driving system, a compensation algorithm must be needed in the control algorithm of the motor drive. In this paper, a new compensation algorithm is proposed. The signal of the integrator output of the d-axis current regulator is chosen and processed to compensate the current measurement errors. The compensation of the current measurement errors is easily implemented to smooth the signal of the integrator output of the d-axis current regulator by subtracting the DC offset value or rescaling the gain of the hall sensor. Therefore, the proposed algorithm has several features: the robustness of the variation of the mechanical parameters, the application of the steady and transient state, the easy implementation, and less computation time.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.770-773
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• 2005

최근 산업 분야에 걸쳐서 고속, 고정밀도의 요구사항에 따라, 회전 모터와 볼 스크류, 벨트를 이용한 직선구동방식보다 빠르고 정확하며, 효율이 높은 직접구동 방식의 리니어모터 및 컨트롤러의 개발이 요구되고 있다. 이런 상황에 고속 연산을 수행할 수 있는 DSP(Digital Signal Processor)의 사용이 불가피하며, 기존의 칩들은 A/D변환기, PWM발생장치 등이 내장되지 않아 제어장치의 부품 수증가 및 복잡성을 피할 수 없었다. 따라서 본 논문에서는 SVPWM(Space Vector Pulse Width Modulation) 및 QEP(Quadrature Encoder Pulse) 회로와 PWM 발생기, 12bit의 고속 A/D변환기, 파워 드라이버보호회로 등을 내장한 TMS320F2812 DSP를 사용하여 반도체장비분야, 자동화분야 등에 사용되는 LBLDCM의 제어를 가능하게 만들었다. 또한, 기존의 DSP 시리즈 보다 연산속도가 고속화되어 고속연산에 의한 시간적 제한을 극복 할 수 있게 되었고, 제어에 필요한 하드웨어적인 기능들을 내장하고 있어서 주변회로가 필요 없게 되었다. 따라서 하드웨어의 간소화와 개발 시간의 단축 및 신뢰도의 향상과 모터 효율의 향상을 가져오도록 하였다. 제안된 제어장치는 제작되어, 실험을 통하여 그 타당성을 입증하였다.

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.398-399
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• 2019

본 논문은 LS산전 고압인버터의 국내외 현장 전용화 사례에 대해 기술한다. 고압인버터는 대용량 고전압 전동기를 구비한 중요부하에 주로 적용되며 단독운전보다는 다수의 고압인버터가 연동 운전하는 현장에 설치되는 경우가 많다. 이러한 현장에는 표준제품이 아닌 전용화 기능을 포함한 제품이 출하가 된다. 자사 LS MVD는 각종 산업설비와 국책연구기관의 시험설비 그리고 발전소 수처리 시설 등 국가기간시설에 많이 적용이 되며 매년 70여대 이상의 MVD가 국내외 전동기 부하에 신규로 설치되어 운용되고 있다. 본 논문에서는 주목할만한 현장의 전용화 사례에 대해 설명하여 향후 고압인버터를 적용하고자 하는 고객이나 고압인버터에 관심이 있는 엔지니어에게 고압인버터에 대한 이해도를 높이고자 한다.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.9
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• pp.129-134
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• 2016

This paper studies the high frequency PWM (pulse width modulation) driving technique to increase an optical efficiency and to prevent an optical color quenching of blue laser for head up display on vehicles using digital micro mirror device (DMD) panel and yellow phosphor wheel. The proposed approach adaptively drives the current pulse width modulated signals of high optical power of blue laser to increase the lifetime and to decrease the stem temperature of laser. This method stabilizes the temperature of laser according to the driving environment and the forward current capacity. By the proposed method, the brightness of blue laser is improved by about 37% compared to the continuous waveform current driving method.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.1
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• pp.45-53
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• 2018

The proliferation of distributed power sources such as renewable energy sources drives the changes of consumers to prosumers who actively want to deal with energy. The prosumer is a new type of consumer that can sell surplus energy or additionally generated energy to electric power companies, other energy service providers, or other consumers. To implement such a concept, a new technology and platform that can support the transaction of the prosumers are required. However, the study in the area is limited since it is in the early stage. This work examines the state-of-the-art transaction-based energy management technology through comparative analysis of representative technologies to show the future trends. Although, technologies and standards for transaction based energy are not much matured yet. related new research will be continued via competitions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.98-106
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• 2009

This work proposes a 1280-RGB $\times$ 800-Dot 70.78mW 0.l3um CMOS LCD driver IC (LDI) for high-performance 16M-color low temperature poly silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD) systems such as ultra mobile PC (UMPC) and mobile applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed LDI optimizes power consumption and chip area at high resolution based on a resistor-string based architecture. The single column driver employing a 1:12 MUX architecture drives 12 channels simultaneously to minimize chip area. The implemented class-AB amplifier achieves a rail-to-rail operation with high gain and low power while minimizing the effect of offset and output deviations for high definition. The supply- and temperature-insensitive current reference is implemented on chip with a small number of MOS transistors. A slew enhancement technique applicable to next-generation source drivers, not implemented on this prototype chip, is proposed to reduce power consumption further. The prototype LDI implemented in a 0.13um CMOS technology demonstrates a measured settling time of source driver amplifiers within 1.016us and 1.072us during high-to-low and low-to-high transitions, respectively. The output voltage of source drivers shows a maximum deviation of 11mV. The LDI with an active die area of $12,203um{\times}1500um$ consumes 70.78mW at 1.5V/5.5V.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.1
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• pp.13-22
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• 2004

This paper drives the exact expression of bit error rate(BER) performance for successive interference cancellation(SIC) algorithm against multipath interference components in a high-speed downlink packet access(HSDPA) system of W-CDMA downlink and the BER performance is evaluated by numerical analysis. Numerical results showed that the average BER performance is rapidly saturated in terms of increasing the number of multipath and is revealed significant improvement for improvement Processing gain(PG). For example, the average BER Performance of the SIC algorithm is superior to the performance of conventional scheme by more than 7dB and 1.4dB for processing gain PG=54 and 128 under the two-path channel and average BER=$1.0{\times}10^{-3}$, respectively. This results also indicated that the average BER saturation is occurred at nearly one weight factor which is assigned to pilot and data channels. Likewise, the average BER performance is greatly degraded due to increasing the interference power in proportional to the number of multipath with increasing multicode K. And the smaller multipath fading channel gain is arrived later, the more the average BER performance is improved. The results of performance analysis in this paper indicated that the multipath interference cancellation is required to improve the BER performance in a HSDPA system under multicode for high-speed packet transmission, low spreading factor, and multipath fading channel.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.62-68
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• 2010

This work proposes a 10b 100MS/s DAC based on a segmented local matching technique primarily for small chip area. The proposed DAC employing a segmented current-steering structure shows the required high linearity even with the small number of devices and demonstrates a fast settling behavior at resistive loads. The proposed segmented local matching technique reduces the number of current cells to be matched and the size of MOS transistors while a double-cascode topology of current cells achieves a high output impedance even with minimum sized devices. The prototype DAC implemented in a 0.13um CMOS technology occupies a die area of $0.13mm^2$ and drives a $50{\Omega}$ load resistor with a full-scale single output voltage of $1.0V_{p-p}$ at a 3.3V power supply. The measured DNL and INL are within 0.73LSB and 0.76LSB, respectively. The maximum measured SFDR is 58.6dB at a 100MS/s conversion rate.