• JSTS:Journal of Semiconductor Technology and Science
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• 제7권3호
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• pp.209-213
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• 2007

The MOS gate capacitance model presented here is determined by directly solving the coupled Poisson equations on the poly and silicon sides, and includes the polysilicon (poly) gate depletion effect. Our compact gate capacitance model exhibits an excellent fit with measured data and parameter values extracted from data are physically acceptable. The data are collected from 0.5, 0.35, 0.25 and $0.18{\mu}m$ CMOS technologies.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 D
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• pp.1337-1339
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• 1998

The trench termination scheme is introduced for high voltage devices. The curvature of the depletion region at field limiting ring is critical factor to determine the breakdown voltage. The smooth curvature of the depletion junction alleviate the electric field crowding effect around this region. In the trench field limiting ring, the radius of the depletion region is smaller than conventional field limiting ring, but the distance between every trench is spaced small enough to punchthrough before initiation of local breakdown. The trench field limiting ring on silicon can ne formed by RIE followed by oxidation on side wall surface of the trench, and polysilicon filling. The combined termination of this trench floating field ring and field plate have been designed and analyzed. The breakdown simulation by 2-dimensional TCAD shows that the cylindrical junction breakdown voltage for substrate doping might be 99 percent of the ideal breakdwon voltage for substrate doping concentration of $3\times10^{14}cm^{-3}$ with about $100{\mu}m$ of lateral termination width.