• Journal of IKEEE
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• v.16 no.4
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• pp.283-289
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• 2012

In this paper, We proposed Separate Gate Technique(SGT) to improve the switching characteristics of Trench power MOSFET. Low gate-to-drain 전하 (Miller 전하 : Qgd) has to be achieved to improve the switching characteristics of Trench power MOSFET. A thin poly-silicon deposition is processed to form side wall which is used as gate and thus, it has thinner gate compared to the gate of conventional Trench MOSFET. The reduction of the overlapped area between the gate and the drain decreases the overlapped charge, and the performance of the proposed device is compared to the conventional Trench MOSFET using Silvaco T-CAD. Ciss(input capacitance : Cgs+Cgd), Coss(output capacitance : Cgd+Cds) and Crss(reverse recovery capacitance : Cgd) are reduced to 14.3%, 23% and 30% respectively. To confirm the reduction effect of capacitance, the characteristics of inverter circuit is comprised. Consequently, the reverse recovery time is reduced by 28%. The proposed device can be fabricated with convetional processes without any electrical property degradation compare to conventional device.

• Current Photovoltaic Research
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• v.9 no.1
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• pp.17-21
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• 2021

In this study, the effect of water level and temperature on the power generation was investigated in a water tank with an aquavoltaic PV module to perform feasibility research for the development of salt farm aquavoltaic system. The silicon solar cell attached to the bottom of each water tank is a 1-cell mini module, and the underwater effects of the crystal phase (19.0~19.9% of single- & 17.9~19.9% of poly-crystalline) of the PV module were investigated, and power generation characteristics for water level (0~10 cm) and temperature (10~40℃) were analyzed. The deterioration coefficients according to the water level and temperature of each single- and poly-crystalline module were investigated at very similar levels such as, -2.01 %/cm and -2.02 %/cm, -0.50 %/℃ and -0.48 %/℃, respectively. Therefore, in salt farm aquavoltaic system, water levels need to maintain as low as possible, and heat-induced degradation is similar to those shown in general land, and no factors have been found to be affected by the underwater environment depending on the determination.

• Journal of Ginseng Research
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• v.46 no.5
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• pp.636-645
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• 2022

Background: Ginsenoside Rg3 and gemcitabine have mutual enhancing antitumor effects. However, the underlying mechanisms are not clear. This study explored the influence of ginsenoside Rg3 on Zinc finger protein 91 homolog (ZFP91) expression in pancreatic adenocarcinoma (PAAD) and their regulatory mechanisms on gemcitabine sensitivity. Methods: RNA-seq and survival data from The Cancer Genome Atlas (TCGA)-PAAD and Genotype-Tissue Expression (GTEx) were used for in-silicon analysis. PANC-1, BxPC-3, and PANC-1 gemcitabine-resistant (PANC-1/GR) cells were used for in vitro analysis. PANC-1 derived tumor xenograft nude mice model was used to assess the influence of ginsenoside Rg3 and ZFP91 on tumor growth in vivo. Results: Ginsenoside Rg3 reduced ZFP91 expression in PAAD cells in a dose-dependent manner. ZFP91 upregulation was associated with significantly shorter survival of patients with PAAD. ZFP91 overexpression induced gemcitabine resistance, which was partly conquered by ginsenoside Rg3 treatment. ZFP91 depletion sensitized PANC-1/GR cells to gemcitabine treatment. ZFP91 interacted with Testis-Specific Y-Encoded-Like Protein 2 (TSPYL2), induced its poly-ubiquitination, and promoted proteasomal degradation. Ginsenoside Rg3 treatment weakened ZFP91-induced TSPYL2 poly-ubiquitination and degradation. Enforced TSPYL2 expression increased gemcitabine sensitivity of PAAD cells and partly reversed induced gemcitabine resistance in PANC-1/GR cells. Conclusion: Ginsenoside Rg3 can increase gemcitabine sensitivity of pancreatic adenocarcinoma at least via reducing ZFP91 mediated TSPYL2 destabilization.

• Journal of Integrative Natural Science
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• v.2 no.1
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• pp.18-23
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• 2009

This minireview provides the chosen examples of our recent discoveries in the polymerization of hydrosilanes, dihydrosilole, lactones, and vinyl derivatives using various catalysts. Hydrosilanes and lactones copolymerize to give poly(lactone-co-silane)s with $Cp_2MCl_2$/Red-Al (M = Ti, Zr, Hf) catalyst. Hydrosilanes (including dihydrosilole) reduce noble metal complexes (e.g., $AgNO_3$, $Ag_2SO_4$, $HAuCl_4$, $H_2PtCl_6$) to give nanoparticles along with silicon polymers such as polysilanes, polysilole, polysiloxanes (and silicas) depending on the reaction conditions. Interestingly, phenylsilane dehydrocoupled to polyphenylsilane in the inert nitrogen atmosphere while phenylsilane dehydrocoupled to silica in the ambient air atmosphere. $Cp_2M/CX_4$ (M = Fe, Co, Ni; X = Cl, Br, I) combination initiate the polymerization of vinyl monomers. In the photopolymerization of vinyl monomers using $Cp_2M/CCl_4$ (M = Fe, Co, Ni), the photopolymerization of MMA initiated by $Cp_2M/CCl_4$ (M = Fe, Co, Ni) shows while the polymerization yield decreases in the order $Cp_2Fe$ > $Cp_2Ni$ > $Cp_2Co$, the molecular weight decreases in the order $Cp_2Co$ > $Cp_2Ni$ > $Cp_2Fe$. For the photohomopolymerization and photocopolymerization of MA and AA, the similar trends were observed. The photopolymerizations are not living. Many exciting possibilities remain to be examined and some of them are demonstrated in the body of the minireview.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.156-157
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• 2012

단일 셀에서 비휘발성 및 고속의 휘발성 메모리를 모두 구동할 수 있는 다기능 메모리는 모바일 기기 및 embedded 장치의 폭발적인 성장에 있어 그 중요성이 커지고 있다. 따라서 최근 이러한 fusion기술을 응용한 unified RAM (URAM)과 같은 다기능 메모리의 연구가 주목 받고 있다. 이러한 다목적 메모리는 주로 silicon on insulator (SOI)기반의 1T-DRAM과 SONOS기술 기반의 비휘발성 메모리의 조합으로 이루어진다. 하지만 이런 다기능 메모리는 주로 단결정기반의 SOI wafer 위에서 구현되기 때문에 값이 비싸고 사용범위도 제한되어 있다. 따라서 이러한 다기능메모리를 다결정 실리콘을 이용하여 제작한다면 기판에 자유롭게 메모리 적용이 가능하고 추후 3차원 적층형 소자의 구현도 가능하기 때문에 다결정실리콘 기반의 메모리 구현은 필수적이라고 할 수 있겠다. 본 연구에서는 다결정실리콘을 이용한 channel recessed구조의 다기능메모리를 제작하였으며 각 1T-DRAM 및 NVM동작에 따른 memory 특성을 살펴보았다. 실험에 사용된 기판은 상부 비정질실리콘 100 nm, 매몰산화층 200 nm의 SOI구조의 기판을 이용하였으며 고상결정화 방법을 이용하여 $600^{\circ}C$ 24시간 열처리를 통해 결정화 시켰다. N+ poly Si을 이용하여 source/drain을 제작하였으며 RIE시스템을 이용하여 recessed channel을 형성하였다. 상부 ONO게이트 절연막은 rf sputter를 이용하여 각각 5/10/5 nm 증착하였다. $950^{\circ}C$ N2/O2 분위기에서 30초간 급속열처리를 진행하여 source/drain을 활성화 하였다. 계면상태 개선을 위해 $450^{\circ}C$ 2% H2/N2 분위기에서 30분간 열처리를 진행하였다. 제작된 Poly Si MFM에서 2.3V, 350mV/dec의 문턱전압과 subthreshold swing을 확인할 수 있었다. Nonvolatile memory mode는 FN tunneling, high-speed 1T-DRAM mode에서는 impact ionization을 이용하여 쓰기/소거 작업을 실시하였다. NVM 모드의 경우 약 2V의 memory window를 확보할 수 있었으며 $85^{\circ}C$에서의 retention 측정시에도 10년 후 약 0.9V의 memory window를 확보할 수 있었다. 1T-DRAM 모드의 경우에는 약 $30{\mu}s$의 retention과 $5{\mu}A$의 sensing margin을 확보할 수 있었다. 차후 engineered tunnel barrier기술이나 엑시머레이저를 이용한 결정화 방법을 적용한다면 device의 특성향상을 기대할 수 있을 것이다. 본 논문에서는 다결정실리콘을 이용한 다기능메모리를 제작 및 메모리 특성을 평가하였다. 제작된 소자의 단일 셀 내에서 NVM동작과 1T-DRAM동작이 모두 가능한 것을 확인할 수 있었다. 다결정실리콘의 특성상 단결정 SOI기반의 다기능 메모리에 비해 낮은 특성을 보여주었으나 이는 결정화방법, high-k절연막 적용 및 engineered tunnel barrier를 적용함으로써 해결 가능하다고 생각된다. 또한 sputter를 이용하여 저온증착된 O/N/O layer에서의 P/E특성을 확인함으로써 glass위에서의 MFM구현의 가능성도 확인할 수 있었으며, 차후 system on panel (SOP)적용도 가능할 것이라고 생각된다.

• Macromolecular Research
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• v.12 no.1
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• pp.127-133
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• 2004

We have studied the surface micelle formation of polystyrene-b-poly(2-vinyl pyridine) (PS-b-P2VP) at the air-water interface. A series of four PS-b-P2VPs were synthesized by anionic polymerization, keeping the PS block length constant (28 kg/㏖) and varying the P2VP block length (1, 11, 28, or 59 kg/㏖). The surface pressure-area ($\pi$-A) isotherms were measured and the surface morphology was studied by atomic force microscopy (AFM) after Langmuir-Blodgett film deposition onto silicon wafers. At low surface pressure, the hydrophobic PS blocks aggregate to form pancake-like micelle cores and the hydrophilic P2VP block chains spread on the water surface to form a corona-like monolayer. The surface area occupied by a block copolymer is proportional to the molecular weight of the P2VP block and identical to the surface area occupied by a homo-P2VP. It indicates that the entire surface is covered by the P2VP monolayer and the PS micelle cores lie on the P2VP monolayer. As the surface pressure is increased, the $\pi$-A isotherm shows a transition region where the surface pressure does not change much with the film compression. In this transition region, which displays high compressibility, the P2VP blocks restructure from the monolayer and spread at the air-water interface. After the transition, the Langmuir film becomes much less compressible. In this high-surface-pressure regime, the PS cores cover practically the entire surface area, as observed by AFM and the limiting area of the film. All the diblock copolymers formed circular micelles, except for the block copolymer having a very short P2VP block (1 kg/㏖), which formed large, non-uniform PS aggregates. By mixing with the block copolymer having a longer P2VP block (11 kg/㏖), we observed rod-shaped micelles, which indicates that the morphology of the surfaces micelles can be controlled by adjusting the average composition of block copolymers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.65-65
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• 2009

High temperature silicon carbide Schottky diode was fabricated with Au deposited on poly 3C-SiC thin film grown on p-type Si(100) using atmospheric pressure chemical vapor deposition. The charge transport mechanism of the diode was studied in the temperature range of 300 K to 550 K. The forward and reverse bias currents of the diode increase strongly with temperature and diode shows a non-ideal behavior due to the series resistance and the interface states associated with 3C-SiC. The charge transport mechanism is a temperature activated process, in which, the electrons passes over of the low barriers and in turn, diode has a large ideality factor. The charge transport mechanism of the diode was analyzed by a Gaussian distribution of the Schottky barrier heights due to the Schottky barrier inhomogeneities at the metal-semiconductor interface and the mean barrier height and zero-bias standard deviation values for the diode was found to be 1.82 eV and $s_0$=0.233 V, respectively. The interface state density of the diode was determined using conductance-frequency and it was of order of $9.18{\times}10^{10}eV^{-1}cm^{-2}$.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.549-552
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• 2004

The thesis describes the design of 12bit digital-to-analog converter (DAC) which shows the conversion rate of 500MHz and the power supply of 3.3V with 0.35${\mu}m$ CMOS 1-poly 4-metal process for advanced wireless transceiver of high speed and high resolution. The proposed DAC employes segmented structure which consists of 6bit MSB, 3bit mSB, 3bit LSB for area efficiency Also, using a optimized aspect ratio of process and new triple diagonal symmetric centroid sequence for high yield and high linearity. The proposed 12bit current mode DAC was employs new deglitch circuit for the decrement of the glitch energy. Simulation results show the conversion rate of 500MHz, and the power dissipation of 85mW at single 3.3V supply voltage. Both DNL and INL are found to be smaller than ${\pm}0.65LSB/{\pm}0.8LSB$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.126-126
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• 2009

Noninvasive plasma diagnostic technique is introduced to analyze and characterize HICP (Helmholtz Inductively Coupled Plasma) source during the plasma etching process. The HICP reactor generates plasma mainly through RF source power at 13.56MHz RF power and RF bias power of 12.56MHz is applied to the cathode to independently control ion density and ion energy. For noninvasive sensors, the RF sensor and the OES (Optical emission spectroscopy) were employed since it is possible to obtain both physical and chemical properties of the reactor with plasma etching. The plasma impedance and optical spectra were observed while altering process parameters such as pressure, gas flow, source and bias power during the poly silicon etching process. In this experiment, we have found that data measured from these noninvasive sensors can be correlated to etch results. In this paper, we discuss the relationship between process parameters and the measurement data from RF sensor and OES such as plasma impedance and optical spectra and using these relationships to analyze and characterize H-ICP source.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2016.11a
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• pp.180-180
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• 2016

보론이 도핑된 $3{\times}3cm$ 크기의 p 형 다결정 실리콘 기판의 표면을 경면연마한 후, 다이아몬드 입자의 seeding을 위해 슬러리 중 다이아몬드 분말의 입도를 5 nm로 고정하고 초음파 전처리 공정을 진행한 후, 다이아몬드 박막을 증착하였다. 다이아몬드 증착은 Microwave Plasma Chemical Vapor Deposition 장비를 이용하였으며, 공정 조건은 초기 진공 $10{\times}10^{-3}Torr$, 공정 가스 비율 $Ar:CH_4=200:2$, 가스 유량 202 sccm, 공정압력 90 Torr, 마이크로웨이브 파워 600 W, 기판 온도 $600^{\circ}C$이었다. 기판에 DC bias 전압을 인가하는 것을 공정 변수로 하여 0, -50, -100, -150, -200 V로 변화시켜가며, 0.5, 1, 2, 4 h 동안 증착을 진행하였다. 주사전자현미경과 XRD, AFM, 접촉각 측정 장비를 이용하여 증착된 다이아몬드 입자와 막의 특성을 분석하였다. 각 bias 조건에서 초기에는 다이아몬드 입자가 형성되어 성장되었다가 시간이 증가될수록 연속적인 다이아몬드 막이 형성되었다. Table 1은 각 bias 조건에서 증착 시간을 4 h까지 변화시키면서 얻은 다이아몬드 입자 또는 박막의 높이(두께)를 나타낸 것이다. 2 h까지의 공정 초기에는 bias 조건의 영향을 파악하기 어려운데, 이는 bias에 의한 과도한 이온포격으로 입자가 박막으로의 성장에 저해를 받는 것으로 사료된다. 증착시간이 4 h가 경과하면서 -150 V 조건에서 가장 두꺼운 막이 성장되었다. 이는 기판 표면을 덮은 다이아몬드 박막 위에서 이차 핵생성이 bias에 의해 촉진되기 때문으로 해석된다. -200 V의 조건에서는 오히려 막의 성장이 더 느렸는데, 이는 Fig. 1에 보이듯이 과도한 이온포격으로 Si/diamond 계면에서 기공이 형성된 것과 연관이 있는 것으로 보인다.