• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.1
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• pp.47-49
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• 2003

The cost of material and slicing of silicon wafer occupied more than 30% of solar cell manufacturing cost. The substitution of silicon wafer into STS 304 stainless steel could be the promising solution to decrease the material cost. Moreover the stainless steel solar cell could have the advantage of low weight and durability. However, the highly polished surface is required to meet the characteristic of solar cell. The electropolishing process in phosphoric acid based solution was used to get the surface quality. The obtained result was 28 nm obtained in current density of 2Amfi/$cm^2$ at $80^{\circ}C$. The leveller effect of glycerine, ethylene glycol and propylen glycol was studied. When the 0.4 g/l of ethylene glycol was added to the electrolyte, the surface roughness was best, 15 nm.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.322-322
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• 2010

For boron doping on n-type silicon wafer, around $1,000^{\circ}C$ doping temperature is required, because of the relatively low solubility of boron in a crystalline silicon comparing to the phosphorus case. Boron doping by fiber laser annealing and lamp furnace heat treatment were carried out for the uniformly deposited p-a-Si:H layer. Since the uniformly deposited p-a-Si:H layer by cluster is highly needed to be doped with high temperature heat treatment. Amorphous silicon layer absorption range for fiber laser did not match well to be directly annealed. To improve the annealing effect, we introduce additional lamp furnace heat treatment. For p-a-Si:H layer with the ratio of $SiH_4:B_2H_6:H_2$=30:30:120, at $200^{\circ}C$, 50 W power, 0.2 Torr for 30 min. $20\;mm\;{\times}\;20\;mm$ size fiber laser cut wafers were activated by Q-switched fiber laser (1,064 nm) with different sets of power levels and periods, and for the lamp furnace annealing, $980^{\circ}C$ for 30 min heat treatment were implemented. To make the sheet resistance expectable and uniform as important processes for the $p^+$ layer on a polished n-type silicon wafer of (100) plane, the Q-switched fiber laser used. In consequence of comparing the results of lifetime measurement and sheet resistance relation, the fiber laser treatment showed the trade-offs between the lifetime and the sheet resistance as $100\;{\omega}/sq.$ and $11.8\;{\mu}s$ vs. $17\;{\omega}/sq.$ and $8.2\;{\mu}s$. Diode level device was made to confirm the electrical properties of these experimental results by measuring C-V(-F), I-V(-T) characteristics. Uniform and expectable boron heavy doped layers by fiber laser and lamp furnace are not only basic and essential conditions for the n-type crystalline silicon solar cell fabrication processes, but also the controllable doping concentration and depth can be established according to the deposition conditions of layers.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1888-1890
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• 1999

In this work, we have systematically studied the effects of filtration and the defect trend as a function of polished wafer count using various filters in Inter-Metal Dielectric(IMD) CMP. The filter Installation in CMP polisher makes defect reduced after IMD CMP. As a result of formation micro-scratches, it shows that slurry filter plays an important role in determining consumable pad lifetime. The filter lifetime is dominated by the defects. We have acknowledged slurry filter lifetime is fixed by the degree of generating defects.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.9
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• pp.749-755
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• 2007

Recently, novel MEMS probe cards can support reliable wafer level chip test with high density probing capacity. However, manufacturing cost and process complexity are crucial weak points for low cost mass production. To overcome these limitations, we have developed micro spring structured MEMS probe card. For fabrication of micro spring module, a wire bonder and electrolytic polished gold wires are used. In this case, stringent tension force control is essential to guarantee the low level contact resistance of micro spring for reliable probing performance. For this, relation between tension force of fabricated probe card and contact resistance is characterized. Compare to conventional probe cards, developed MEMS probe card requires fewer fabrication steps and it can be manufactured with lower cost than other MEMS probe cards. Also, due to the small contact scratch patterns, we expect that it can be applied to bumping types chip test which require higher probing density.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.63-63
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• 2003

The nanotopography of silicon wafers has emerged as an important factor in the STI process since it affects the post-CMP thickness deviation (OTD) of dielectric films. Ceria slurry with surfactant is widely applied to STI-CMP as it offers high oxide-to-nitride removal selectivity. Aiming to control the nanotopography impact through ceria slurry characteristics, we examhed the effect of surfactant concentration and abrasive size on the nanotopography impact. The ceria slurries for this study were produced with cerium carbonate as the starting material. Four kinds of slurry with different size of abrasives were prepared through a mechanical treatment The averaged abrasive size for each slurry varied from 70 nm to 290 nm. An anionic organic surfactant was added with the concentration from 0 to 0.8 wt %. We prepared commercial 8 inch silicon wafers. Oxide Shu were deposited using the plasma-enhanced tetra-ethyl-ortho-silicate (PETEOS) method, The films on wafers were polished on a Strasbaugh 6EC. Film thickness before and after CMP was measured with a spectroscopic ellipsometer, ES4G (SOPRA). The nanotopogrphy height of the wafer was measured with an optical interferometer, NanoMapper (ADE Phase Shift)

• Journal of the Korean Ceramic Society
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• v.40 no.2
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• pp.167-171
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• 2003

CMP(Chemical Mechanical Planarization) slurry for STI process is made by mechanically synthesized$CeO_2$as abrasive. The abrasive can be stabilized by electrostatic or steric stabilization in aqueous slurry and steric stabilization is more effective for long-term stability. Blanket-type$SiO_2$and $Si_3N_4$ wafers are polished with CMP slurry containing$CeO_2$synthesized in 50$0^{\circ}C$ or $700^{\circ}C$. Removal rate and surface uniformity of$SiO_2$and$Si_3N_4$wafer and selectivity are influenced by synthetic condition of abrasive, suspension stability and pH of slurries.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.9
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• pp.707-713
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• 2001

As the integrated circuit device shrinks to smaller dimensions, chemical mechanical polishing (CMP) process was requirdfo the global planarization of inter-metal dielectric (IMD) layer with free-defect. However, as the IMD layer gest thinner, micro-scratches are becoming as major defects. However, as the IMD layer gets thinner, micro-scratches are becoming as major defects. Micro-scratches are generated by agglomerated slurry, solidified and attached slurry in pipe line of slurry supply system. To prevent agglomerated slurry particle from inflow, we installed 0.5${\mu}{\textrm}{m}$ point of use (POU) filter, which is depth-type filter and has 80% filtering efficiency for the 1.0${\mu}{\textrm}{m}$ size particle. In this paper, we studied the relationship between defect generation and polished wafer counts to understand the exact efficiency fo the slurry filteration, and to find out the appropriate pad usage. Our experimental results showed that it sis impossible to prevent defect-causing particles perfectly through the depth-type filter. Thus, we suggest that it is necessary to optimize the slurry flow rate, and to install the high spray bar of de-ionized water (DIW) with high pressure, to overcome the weak-point of depth type filter.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.430-430
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• 2008

Using multi plasma enhanced chemical vapor deposition system (Multi-PECVD), p-a-Si:H deposition layer as a $p^+$ region which was annealed by laser (Q-switched fiber laser, $\lambda$ = 1064 nm) on an n-type single crystalline Si (100) plane circle wafer was prepared as new doping method for single crystalline interdigitated back contact (IBC) solar cells. As lots of earlier studies implemented, most cases dealt with the excimer (excited dimer) laserannealing or crystallization of boron with the ultraviolet wavelength range and $10^{-9}$ sec pulse duration. In this study, the Q-switched fiber laser which has higher power, longer wavelength of infrared range ($\lambda$ = 1064 nm) and longer pulse duration of $10^{-8}$ sec than excimer laser was introduced for uniformly deposited p-a-Si:H layer to be annealed and to make sheet resistance expectable as an important process for IBC solar cell $p^+$ layer on a polished n-type Si circle wafer. A $525{\mu}m$ thick n-type Si semiconductor circle wafer of (100) plane which was dipped in a buffered hydrofluoric acid solution for 30 seconds was mounted on the Multi-PECVD system for p-a-Si:H deposition layer with the ratio of $SiH_4:H_2:B_2H_6$ = 30:120:30, at $200^{\circ}C$, 50 W power, 0.2 Torr pressure for 20 minutes. 15 mm $\times$ 15 mm size laser cut samples were annealed by fiber laser with different sets of power levels and frequencies. By comparing the results of lifetime measurement and sheet resistance relation, the laser condition set of 50 mm/s of mark speed, 160 kHz of period, 21 % of power level with continuous wave mode of scanner lens showed the features of small difference of lifetime and lowering sheet resistance than before the fiber laser treatment with not much surface damages. Diode level device was made to confirm these experimental results by measuring C-V, I-V characteristics. Uniform and expectable boron doped layer can play an important role to predict the efficiency during the fabricating process of IBC solar cells.

• Journal of the Korean Solar Energy Society
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• v.33 no.2
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• pp.11-17
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• 2013

Silicon nitride($SiN_x:H$) deposited by radio frequency plasma enhanced chemical vapor deposition(RF-PECVD) is commonly used for anti-reflection coating and passivation in crystalline silicon solar cell fabrication. In this paper, characteristics of the deposited silicon nitride was studied with change of working pressure, deposition temperature, gas ratio of $NH_3$ and $SiH_4$, and RF power during deposition. The deposition rate, refractive index and effective lifetime were analyzed. The (100) p-type silicon wafers with one-side polished, $660-690{\mu}m$, and resistivity $1-10{\Omega}{\cdot}cm$ were used. As a result, when the working pressure increased, the deposition rate of SiNx was increased while the effective life time for the $SiN_x$-deposited wafer was decreased. The result regarding deposition temperature, gas ratio and RF power changes would be explained in detail below. In this paper, the optimized condition in silicon nitride deposition for silicon solar cell was obtained as 1.0 Torr for the working pressure, $400^{\circ}C$ for deposition temperature, 500 W for RF power and 0.88 for $NH_3/SiH_4$ gas ratio. The silicon nitride layer deposited in this condition showed the effective life time of > $1400{\mu}s$ and the surface recombination rate of 25 cm/s. The crystalline silicon solar cell fabricated with this SiNx coating showed 18.1% conversion efficiency.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.525-526
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• 2007

Over-polishing is required to completely remove the material of top surface across whole wafer, in spite of a local dishing problem. This paper introduces the two-step CMP process using protective layer and high selectivity slurry, to reduce dishing amount and variation. The 30nm thick protective oxide layer was deposited on the pattern, and then polished with low selectivity slurry to partially remove the projected area while suppressing the removal rate of the recessed area. After the first step CMP process, high selectivity slurry was used to minimize the dishing amount and variation in pattern structure. Experimental result shows that two-step CMP process can be successfully applicable to reduce the dishing defect generated in over-polishing.