• 제목/요약/키워드: pixel array

검색결과 262건 처리시간 0.027초

Extension of the Dynamic Range using the Switching Operation of In-Pixel Inverter in Complementary Metal Oxide Semiconductor Image Sensors

  • Seong, Donghyun;Choi, Byoung-Soo;Kim, Sang-Hwan;Lee, Jimin;Lee, Jewon;Lee, Junwoo;Shin, Jang-Kyoo
    • 센서학회지
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    • 제28권2호
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    • pp.71-75
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    • 2019
  • This paper proposes the extension of the dynamic range in complementary metal oxide semiconductor (CMOS) image sensors (CIS) using switching operation of in-pixel inverter. A CMOS inverter is integrated in each unit pixel of the proposed CIS for switching operations. The n+/p-substrate photodiode junction capacitances are added to each unit pixel. When the output voltage of the photodiode is less than half of the power supply voltage of the CMOS inverter, the output voltage of the CMOS inverter changes from 0 V to the power supply voltage. Hence, the output voltage of the CMOS inverter is adjusted by changing the supply voltage of the CMOS inverter. Thus, the switching point is adjusted according to light intensity when the supply voltage of the CMOS inverter changes. Switching operations are then performed because the CMOS inverter is integrated with in each unit pixel. The proposed CIS is composed of a pixel array, multiplexers, shift registers, and biasing circuits. The size of the proposed pixel is $10{\mu}m{\times}10{\mu}m$. The number of pixels is $150(H){\times}220(V)$. The proposed CIS was fabricated using a $0.18{\mu}m$ 1-poly 6-metal CMOS standard process and its characteristics were experimentally analyzed.

CMOS공정으로 집적화된 저항형 지문센서 (CMOS Integrated Fingerprint Sensor Based on a Ridge Resistivity)

  • 정승민
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2008년도 추계종합학술대회 B
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    • pp.571-574
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    • 2008
  • 본 논문에서는 개선된 회로를 적용한 $256{\times}256$ 픽셀 저항형 지문센서를 제안하고 있다. 단위 픽셀 수준의 센싱 회로는 가변적인 전류를 전압으로 변환하여 이진 디지털 신호로 만든다. 정전기에 효과적으로 대처할 수 있는 인접 픽셀 간 전기적 차폐 레이아웃 구조를 제안하고 있다. 전체회로는 단위 센서 회로를 확장하여 ASIC 설계방식을 통하여 설계한 뒤 로직 및 회로에 대하여 모의실험을 하였다. 전체회로는 $0.35{\mu}m$ 표준 CMOS 공정규칙을 적용하여 센서블록은 전주문 방식을 적용하고 전체 칩은 자동배선 틀을 이용하여 반주문 방식으로 레이아웃을 실시하였다.

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영상 평활화를 위한 화소-병렬 영상처리 시스템에 관한 연구 (A Study on the Pixel-Paralled Image Processing System for Image Smoothing)

  • 김현기;이천희
    • 대한전자공학회논문지SD
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    • 제39권11호
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    • pp.24-32
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    • 2002
  • 본 논문에서는 포맷 변환기를 사용하여 여러 가지 영상처리 필터링을 구현하였다. 이러한 설계 기법은 집적회로를 이용한 대규모 화소처리배열을 근거로 하여 실현하였다. 집적구조의 두가지 형태는 연산병렬프로세서와 병렬 프로세스 DRAM(또는 SRAM) 셀로 분류할 수 있다. 1비트 논리의 설게 피치는 집적 구조에서의 고밀도 PE를 배열하기 위한 메모리 셀 피치와 동일하다. 이러한 포맷 변환기 설계는 효율적인 제어 경로 수행을 능력을 가지고 있으며 하드웨어를 복잡하게 할 필요 없이 고급 기술로 사용 될 수 있다. 배열 명령어의 순차는 프로세스가 시작되기 전에 호스트 컴퓨터에 의해 생성이 되며 명령은 유니트 제어기에 저장이 된다. 호스트 컴퓨터는 프로세싱이 시작된 후에 저장된 명령어위치에서 시작하여 화소-병렬 동작을 처리하게 된다. 실험 결과 1)단순한 평활화는 더 높은 공간의 주파수를 억제하면서 잡음을 감소시킬 뿐 아니라 에지를 흐리게 할 수 있으며, 2) 평활화와 분할 과정은 날카로운 에지를 보존하면서 잡음을 감소시키고, 3) 평활화와 분할과 같은 메디안 필터링기법은 영상 잡음을 줄이기 위해 적용될 수 있고 날카로운 에지는 유지하면서 스파이크 성분을 제거하고 화소 값에서 단조로운 변화를 유지 할 수 있었다.

The Optimization of Indium Zinc Oxide Thin Film Process in Color Filter on Array structure

  • Lee, Je-Hun;Kim, Jin-Suek;Jeong, Chang-Oh;Kim, Shi-Yul;Lim, Soon-Kwon;Souk, Jun-Hyung
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.1244-1247
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    • 2004
  • For obtaining the best panel quality of color filter on array(COA) architecture in TFF LCD, we investigated the influence of deposition temperature, $O_2$ flow, thickness on the optical transmittance, wet etching and adhesion properties of IZO deposited onto each color photo resist(red, green, blue). Average transmittance of the pixel single layer in the visible range(between 380 and 780nm) was mainly affected by thickness and showed maximum at 1250 ${\AA}$ while the thickness showing peak transparency in each R, G, B wavelength was different. The relation was calculated by using bi-layer transmission and reflectance model, which corresponded to experimental data very well. The adhesion of IZO deposited on each color PR was found to have enhanced value except red PR case, compared to that of IZO which was deposited on $SiN_x$. Wet etching pattern linearity was decreased as the thickness increased. The thickness of IZO was one of vital factors in order to optimize overall pixel process for fabricating COA structure.

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FPGA를 이용한 영상처리 구동을 위한 정합모듈 설계 (Design of Interface Module for Driving of Image Processing Using FPGA)

  • 정성혁;김정태
    • 한국정보통신학회논문지
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    • 제14권9호
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    • pp.2071-2077
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    • 2010
  • 본 논문에서는 이미지 센서와 외부의 구성요소 들과의 정합 모듈을 FPGA(Field Programmable Gate Array)를 사용하여 설계하였다. 일반적으로, 저준위 이미지의 데이터를 동기화하기 위하여 SRAM이 요구된다. 본문에서는 신호와 픽셀 단위의 크기를 가진 이미지 신호를 동기화하기 위하여 FPGA를 사용하여 인터페이스의 정합 모듈을 설계함을 목적으로 한다. 본 논문에서는 픽셀 단위로 구현함으로써 고화질의 이미지를 얻을 수 있다. 사용한 이미지 센서와 TFT-LCD의 동작 주파수는 각각 50MHz와 6.5MHz이다. 또한, 구현한 대부분의 제어부는 FPGA에 내장되어 있고 Altera사의 Quartus II 저작도구를 사용하였으며, 설계된 논리 게이트의 수는 33,216 개다.

Application of Hydrogenated Amorphous Silicon(a-Si : H) Radiation Detectors in Nuclear Medicine

  • Lee, Hyoung-Koo;Mendez, Victor-Perez;Shinn, Kyung-Sub
    • 한국의학물리학회지:의학물리
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    • 제6권1호
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    • pp.65-77
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    • 1995
  • A new gamma camera using a-Si : H photodetectors has been designed for the imaging of heart and other small organs. In this new design the photomultiplier tubes and the position sensing circuitry are replaced by 2-D array of a-Si : H p-i-n pixel photode tectors and readout circuitry which are built on a substrate. Without the photomultiplier tubes this camera is light weight, hence can be made portable. To predict the characteristics and the performance of this new gamma camera we did Monte Carlo simulations. In the simulations 128${\times}$128 imaging array of various pixel sixes were used. $\^$99m/Tc(140keV)and $\^$201/Tl(70keV) were used as radiation sources. From the simulations we could obtain the resolution of the camera and ther overall system, and the blurring effects due to scattering in the phantom. Using the Wiener filter for image processing, restoration of the blurred image could be achieved. Simulation results of a-Si : H based gamma camera were compared with those of a conwentional gamma camera.

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Optimized Gate Driving to Compensate Feed-through Voltage for $C_{ST}-on-Common$

  • Jung, Soon-Shin;Yun, Young-Jun;Park, Jae-Woo;Roh, Won-Yeol;Choi, Jong-Sun
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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    • pp.73-74
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    • 2000
  • In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate signal delay, feed-through voltage and image sticking[1-3]. To improve these problems which are caused by the feed-through voltage, we have evaluated new driving methods to reduce the feed-through voltage. Two level gate-pulse was used for the gate driving of the cst-on-common structure pixels. These gate driving methods offer better feed-through characteristics than conventional simple gate pulse. Optimized step signal will compensate by step pulse time and voltage. The evaluation of the suggested driving methods were performed by using a TFT-LCD array simulator PDAST which can simulate the gate, data and pixel voltages of a certain pixel at any time and at any location on a TFT array. The effect of the new driving method was effectively analyzed.

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HIGH RESOLUTION IMAGE ACQUISITION MODE USING PANCHROMATIC REDUNDANT CHANNEL

  • Chang, Young-Jun;Kong, Jong-Pil;Huh, Haeng-Pal;Kim, Young-Sun;Park, Jong-Uk
    • 대한원격탐사학회:학술대회논문집
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    • 대한원격탐사학회 2006년도 Proceedings of ISRS 2006 PORSEC Volume II
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    • pp.800-803
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    • 2006
  • The Space-borne electro-optical camera system, like KOMPSAT has panchromatic redundant image channel as well as primary channel in order to increase reliability of satellite system. In most case redundant channel never been used during the whole mission period. Staggered array configuration using redundant image channel and new operation mode proposed which operates primary and redundant channel simultaneously. Without new hardware design, fast electronics and system complexity, we can get 1.414 times more fine GSD image of original system and aliasing effect which corrupt high frequency information of image can be minimized. To get the more efficiency from staggered array configuration, we introduce masked pixel CCD.

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교류 구동형 박막 전계 발광 소자용 원추형 Si micro-tip 반사체 어래이의 제작 (Fabrication of Cone-shaped Si Micro-tip Reflector Array for Alternating Current Thin Film Electroluminescent Device Application)

  • 주병권;이윤희;오명환
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제48권9호
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    • pp.662-664
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    • 1999
  • We fabricated AC-TFEL device having cone-shaped Si micro-tip reflector array based on the process which have been conventionally employed for the Si-tip field emitter array in FED system. As a result, the AC-TFEL device having a new geometrical structure could generate well concentrated visible white-light from 3600 reflectors/pixel under bipolar pulse excitation mode only by edge-emission mechanism.

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Resolution-enhanced Reconstruction of 3D Object Using Depth-reversed Elemental Images for Partially Occluded Object Recognitionz

  • Wei, Tan-Chun;Shin, Dong-Hak;Lee, Byung-Gook
    • Journal of the Optical Society of Korea
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    • 제13권1호
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    • pp.139-145
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    • 2009
  • Computational integral imaging (CII) is a new method for 3D imaging and visualization. However, it suffers from seriously poor image quality of the reconstructed image as the reconstructed image plane increases. In this paper, to overcome this problem, we propose a CII method based on a smart pixel mapping (SPM) technique for partially occluded 3D object recognition, in which the object to be recognized is located at far distance from the lenslet array. In the SPM-based CII, the use of SPM moves a far 3D object toward the near lenslet array and then improves the image quality of the reconstructed image. To show the usefulness of the proposed method, we carry out some experiments for occluded objects and present the experimental results.