• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.3
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• pp.289-295
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• 2014

In this paper a wideband active balun using advanced phase correction architecture is proposed. The proposed active balun is constructed with each different architecture of active balun combined with the cascode architecture to improve phase correction performance compared with conventional phase correction techniques. Operating over 0.6~2.0 GHz band, the proposed balun shows $10^{\circ}$ of phase error and 2 dB of gain error with 7 mW power consumption from 1.8 V supply voltage.

• ETRI Journal
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• v.28 no.6
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• pp.793-795
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• 2006

When quadrature error exists, the shape of the M-ary phase shift keying (MPSK) signal constellation becomes skewed-elliptic. Each MPSK symbol takes on a different symbol error probability (SEP) value. The analytical results presented thus far have been derived from studies which examined the SEP problem assuming that the SEP of each MPSK symbol is equally likely; therefore, those results should not be treated as offering a complete solution. In this letter, we present a new and more complete solution to the SEP problem of MPSK by relaxing the above assumption and finding the expressions for the average as well as individual SEP in the presence of quadrature error.

• ETRI Journal
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• v.31 no.5
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• pp.619-621
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• 2009

In this letter, we study the influence of receiver imperfections on bit error rate (BER) degradations in detecting low-density parity-check coded multilevel phase-shift keying signals transmitted over a Rician fading channel. Based on the analytical system model which we previously developed using Monte Carlo simulations, we determine the BER degradations caused by the simultaneous influences of stochastic phase error, quadrature error, in-phase-quadrature mismatch, and the fading severity.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.247-249
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• 2008

There are many types of grid-connected inverter controllers; Synchronous Reference Frame (SRF)-based controller is the most popular methods. SRF-based controller is capable for reducing both of zero-steady state error and phase delay. However, SRF-based controller has a complex algorithm to apply in real application such as digital processor. Resonant controller is also reduced zero-steady state error, but its transfer function has a high order. In this paper, a simple proportional control is applied for grid connected inverter with LCL filter. LCL filter is a third order system. Applying a simple proportional controller is not increased the order of closed loop transfer function. By this technique, the single phase model is easily obtained. To reduce steady state error, proportional gain is set as high as possible, but it may produce instability. To compromise between a minimum steady state error and stability, the single phase model is evaluate through Root Locus and Bode diagram. PSIM simulation is used to verify the analysis.

• The Journal of the Acoustical Society of Korea
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• v.24 no.2E
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• pp.61-66
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• 2005

Experimental work in underwater acoustic communications using passive phase conjugation has shown that the demodulation error depends on the relative drift rate between the source and receiver [Rouseff et al., IEEE J. Oceanic Eng. 26, 821-831 (2001)]. The observed effect involves the mismatch between the initial impulse response and the subsequent response after the source or receiver has changed locations. In the present work, the effect of drifting source is analyzed by numerical simulations and compared to the experimental results. The communications bit error rate is qualified as a function of drift rate, drifting direction, and source-receiver range.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.2
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• pp.252-258
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• 2000

In this paper, we improve error performance for BPSK and QPSK when the carrier recovery signal is not perfect in the multipath Rician fading channel based on DS-CDMA system. In the case, we use the MRC(Maximal Ratio Combining) diversity and convolutional coding technique in order to overcome this carrier phase error and Rician fading. With results of analysis, we know that the appropriate use of MRC diversity and convolutional code reduced considerably performance degradation due to phase error.

• Journal of the Optical Society of Korea
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• v.16 no.4
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• pp.401-408
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• 2012

The amplitude error of phase modulator used in closed-loop fiber optic gyroscope has occurred by the temperature dependency of the electro-optic coefficient, and also can be due to the square-wave dither signal which is generally applied for eliminating the deadzone. This error can cause bias drift and scale factor error. This paper analyzes the temperature dependency of the modulation amplitude and the relationship with the scale factor of the gyroscope, and deals with an amplitude control method. The error calculation logic considering the dither signal is implemented on the signal processing module. The result of experiments from a prototype gyroscope shows the effect of the modulation amplitude control and a considerable improvement on performances.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.5
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• pp.55-67
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• 1982

In this Paper new results relating to the acquisition behavior of a class of first-and secondorder digital phase-locked loops (DPLL) originally proposed by Reddy and Cupta are presented in the absence of noise. It has been found that the number of quantization levels L and the number of phase error states N play important roles in acquisition. For a given L-level quantizer, as N increases, the acquisition time increases, and the lock range decreases. However, the deviation of the steady state phase error decreases in this case. When L increases, the acquisition time decreases, and the lock range increases. However, variation of L affects little for the steady state phase error. In addition, the effects of a loop filter on acquisition have also been considered. One can get smaller acquisition time and larger lock range as the filter parameter value becomes larger. However, deviation of the steady state phase error increases in that case. Analytical results have been verified by computer simulation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.2
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• pp.38-50
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• 1982

A new type of digital phase-locked loop (DPLL) called the modified digital Costas loop is proposed and analyzed. The main feature of the proposed loop is that the phase error detector of the loop has linear characteristic. This results from the use of the tan-1 (.) function in the loop. Accordingly, the DPLL can be characterized by a modulo-2$\pi$ linear difference equation. This paper is diveide into two parts. In Part I we describe the proposed system, and analyze the performance of the first-and second-order loops in the absence of noise by the Phase Plane technique. The locking ranges for the DPLL's to achieve exact locking independently of initial conditions have been obtained in closed forms. Also, the false lock and oscillation phenomena occurring under some initial conditions have been considered. These results have been verified by computer simulation. In Part ll we analyze the proposed system in the presence of noise. The steady state probability density function, mean and variance of the phase error have been obtained by solving the Chapman-Kolmogorov equation. These results will be presented in Part ll.

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.128-135
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• 2004

This paper proposes a phase measurement algorithm which is based on the recursive implementation of sliding-DFT. The algorithm is designed to have a robust behavior against the erroneous factors of frequency drift, additive noise, and twiddle factor approximation. The size of phase error caused by the finite wordlength implementation of DFT twiddle factors is shown significantly lower than that of magnitude error. The drastic reduction of the phase error is achieved by the exploitation of the quadruplet symmetry characteristics of the approximated twiddle factors in the complex plane. Four channel power-line phase measurement system is also designed and implemented based on the time-multiplexed sharing architecture of the proposed algorithm. The operation of the developed system is also verified by the experiment performed under the test environment implemented with the multi-channel function generator and the on-line interfaced host processor system. The proposed algorithm's features of phase measurement accuracy and its robustness against the finite wordlength effects can provide a significant impact especially for the ASIC or microprocessor based embedded system applications where the enhanced processing speed and implementation simplicity are crucial design considerations.