• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.311-312
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• 2010

The fabricated photovoltaic cells based on PIN heterojunctions, in this study, have a structure of ITO/poly(3, 4-ethylenedioxythiophene)-poly(styrenesulfonate)(PEDOT:PSS)/donor/donor:C60(10nm)/C60(35nm)/2, 9-dimethyl-4, 7-diphenyl-1, 10-phenanthroline(8nm)/Al(100nm). The thicknesses of an active layer(donor:C60), an electron transport layer(C60), and hole/exciton blocking layer(BCP) were fixed in the organic photovoltaic cells. We investigated the performance characteristics of the PIN organic photovoltaic cells with copper phthalocyanine(CuPc), tetracene and pentacene as a hole transport layer. Discussion on the photovoltaic cells with CuPc, tetracene and pentacene as a hole transport layer is focussed on the dependency of the power conversion efficiency on the deposition rate and thickness of hole transport layer. The device performance characteristics are elucidated from open-circuit-voltage(Voc), short-circuit-current(Jsc), fill factor(FF), and power conversion efficiency($\eta$). As the deposition rate of donor is reduced, the power conversion efficiency is enhanced by increased short-circuit-current(Jsc). The CuPc-based PIN photovoltaic cell has the limited dependency of power conversion efficiency on the thickness of hole transport layer because of relatively short exciton diffusion length. The photovoltaic cell using tetracene as a hole transport layer, which has relatively long diffusion length, has low efficiency. The maximum power conversion efficiencies of CuPc, tetracene, and pentacene-based photovoltaic cells with optimized deposition rate and thickness of hole transport layer have been achieved to 1.63%, 1.33% and 2.15%, respectively. The photovoltaic cell using pentacene as a hole transport layer showed the highest efficiency because of dramatically enhanced Jsc due to long diffusion length and strong thickness dependence.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1748-1750
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• 2000

There are currently considerable interests in the applications of conjugated polymers, oligomers. and small molecules for thin-film electronic devices. Organic materials have potential advantages to be utilized as semiconductors in field-effect transistors and light-emitting diodes. In this study we fabricated the devices based on pentacene as active layer. Octadecyltrichlorosilane (OTS) is used as buffer layer between $SiO_2$ and pentacene. Atomic force microscopy (AFM), X-ray diffraction (XRD), and electrical conductivity were used with OTS on $SiO_2$ 10nm which the pentacene layer was thermally evaporated in vacuum at a pressure of about $2.0\times10^{-6}$ Torr. In the result of AFM, the grain length is grown by using OTS for surface treatment. Electrical conductivity is changed from $3.19{\times}10^{-6}$ S/cm to $2.12{\times}10^{-7}$ S/cm. We observed that electrical conductivity is also increased by surface treatment. According to these results, the surface treated devices exhibited the increase to compared no treatment.

• Proceedings of the KIEE Conference
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• 2000.11c
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• pp.455-457
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• 2000

In this work the electrical characteristics of organic TFTs with the semiconductor-insulator interfaces, where the gate dielectrics were treated by the two methods which are the deposition of Octadecyltrichlorosilane (OTS) on the insulator and rubbing the insulator surface. Pentacene is used as an active semiconducting layer. The semiconductor layer of pentacene was thermally evaporated in vacuum at a pressure of about $2{\times}10^{-7}$ Torr and at a deposition rate of $0.3{\AA}/sec$. Aluminum and gold were used for the gate and source/drain electrodes. OTS is used as a self-alignment layer between $SiO_2$ and pentacene. The gate dielectric surface was rubbed before pentacene is deposited on the insulator. In order to confirm the changes of the surface morphology the atomic force microscopy (AFM) was utilized. The characteristics of the fabricated TFTs are measured to clarify the effects of the surface treatment.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2007.11a
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• pp.77-81
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• 2007

Pentacene was dissolved in N-methyspyrrolidone (NMP) and mixed with poly(3,4-ethylenedioxythiophene), poly(styrenesulfonate) (PEDOT:PSS). The solution color changed from deep purple to intense yellow. As the dissolution time increased, visible absorption decreased and ultraviolet (UV) absorption increased. PEDOT:PSS or Pentacene-PEDOT:PSS was spin-coated to control the layer thickness. Three-layered Schottky diodes consisting of Al, PEDOT:PSS or PEDOT:PSS-pentacene, and Au with thickness of 300nm, respectively, were fabricated. The current densities of $4.8{\mu}A/cm^2$ at 2.5MV/m and $660{\mu}A/cm^2$ at 1.9MV/m were obtained for the Au/PEDOT:PSS/Al and Au/Pentacene-PEDOT:PSS/Al Schottky diodes, respectively. The current density of the Schottky diode was enhanced by about two orders of magnitude by doping pentacene to PEDOT:PSS.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.238-239
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• 2006

본 논문은 게이트 절연막에 OTS(n-octadecy trichlorosilance) 혼합용액을 이용하여 SAMs(Self-Assembled Monolayers)막을 형성하였다. OTS 혼합용액은 OTS를 0.1w%와 0.5w% 각각을 클로로포름 30w%와 헥산 70w%에 혼합하여 만들었다. 이 혼합용액을 게이트 절연막위에 표면처리하였다. 활성층인 Pentacene이 게이트 절연막 위에 증착될 때, OTS 혼합용액의 비에 따라 누설전류특성을 보았다. OTS를 0.1w% 처리한것이 0.5w%보다 누설전류가 더 작게 나타났다. 결과적으로 OTFT의 게이트 절연막의 절열특성은 향상시키는데 OTS 혼합용액의 비가 큰 영향을 준다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.395-395
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• 2007

We report on the fabrication of soluble pentacene-based thin-film transistors (TFTs) that consist of $NiO_x$, poly-vinyl phenol (PVP), and Ni for the source-drain (SID) electrodes, gate dielectric, and gate electrode, respectively. The $NiO_x$ SID electrodes of which the work function is well matched to that of soluble pentacene are deposited on a soluble pentacenechannel by sputter deposited of NiO powder and show a moderately low but still effective transmittance of ~65% in the visible range along with a good sheet resistance of ${\sim}40{\Omega}/{\square}$. The maximum saturation current of our soluble pentacene-based TFT is about $15{\mu}A$ at a gate bias of -40showing a high field effect mobility of $0.06cm^2/Vs$ in the dark, and the on/off current ratio of our TFT is about $10^4$. It is concluded that jointly adopting $NiO_x$ for the S/D electrodes and PVP for gate dielectric realizes a high-quality soluble pentacene-based TFT.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.159-161
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• 2007

We fabricated flexible OTFT-backplanes for the electrophoretic display(EPD). The OTFTs employed bottom contact structure on PEN substrate and used the cross-linked polyvinylphenol for gate insulator, pentacene for active layer. Especially, we used PVA/Acryl double layers for passivation of backplane as well as for pixel dielectric layer between backplane and EPD panel. The OTFT-EPD panel worked successfully anddemonstrated to display some patterns.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.379-379
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• 2013

본 논문에서는 Normal ink jetting 공법으로 OTFT를 제작할 때 coffee stain effect에 의해서 반도체 소자의 특성이 저하되는 것을 극복하기 위해서 동일한 위치에 동일한 부피로 Droplet을 형성하는 Multiple ink jetting 공법을 통해 TIPS pentacene 결정의 Morphology와 전기적 특성이 어떻게 변화하는지 알아 보았다. Multiple ink jetting의 drop 횟수가 증가할수록 coffee stain effect에 의해서 형성된 가운데 영역의 Dendrite grain이 점점 작아지다가 7 Drops 이후로는 Big grain 만 남게 되었다. Active layer의 표면 Roughness는 drop 횟수가 증가할수록 낮아지다가 일정 count 이후로는 다시 높아지는 것을 확인할 수 있었다. 전계 이동도(mobility)는 drop 횟수가 증가할수록 커지다가 일정 count 이후로는 saturation되는 것을 확인할 수 있었다. Multiple ink jetting에 의해서 만들어진 OTFT 소자의 전계 이동도(mobility)는 1 drop과 10 drops에서 각각 0.0059, 0.036 cm2/Vs 로 6배 정도 차이가 있었다. 이것은 첫 drop에 의해 만들어진 가운데 Dendrite grain 영역이 Multiple ink jetting을 반복하면서 점점 작아지게 되어 사라지고 두꺼운 Grain 영역만 남게 된 것으로 판단된다. Vth 와 On/Off ratio는 1 drop과 10 drops에서 각각 -3 V, -2 V 그리고 $3.3{\times}10^3$, $1.0{\times}10^4$를 보였다. OTFT의 substrate로 Flexible한 polyethersulfone (PES) 기판을 사용하였고, 절연체로 Spin coating된 Poly-4-vinylphenol (PVP)가 사용되었으며, Gate 및 Source/Drain 전극은 Au를 50 nm 두께로 증착하였다. Channel의 width와 length는 각각 100 um, 40 um 였고, Gate 전극 위에 Active layer를 형성한 Bottom gate 구조로 제작되었다. Ink jet으로 제작된 TIPS pentacene의 결정성은 x-ray diffraction (XRD)와 광학 현미경으로 분석하였고 Thickness profile은 알파스텝 측정기를 이용하였으며, OTFT의 전기적 특성은 Keithley-4,200을 사용하여 측정하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.7
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• pp.1-8
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• 2008

We fabricated flexible electrophoretic display(EPD) driven by organic thin film transistors(OTFTs) on plastic substrate. We designed the W/L of OTFT to be 15, considering EPD's transient characteristics. The OTFTs employed bottom contact structure and used Al for gate electrode, the cross-linked polyvinylphenol for gate insulator, pentacene for active layer. The plastic substrate was coated by PVP barrier layer in order to remove the islands which were formed after pre-shrinkage process and caused the electrical short between bottom scan and top data metal lines. Pentacene active layer was confined within the gate electrodes so that the off current was controlled and reduced by gate electrodes. Especially, PVA/Acryl double layers were inserted between EPD panel and OTFT-backplane in order to protect OTFT-backplane from the damages created by lamination process of EPD panel on the backplane and also accommodate pixel electrodes through via holes. From the OTFT-backplane the mobility was $0.21cm^2/V.s$, Ion/Ioff current ratio $10^5$. The OTFT-EPD panel worked successfully and demonstrated to display some patterns.

• Proceedings of the KSME Conference
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• 2007.05a
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• pp.441-445
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• 2007

In this paper we demonstrated the applications of OTFTs (organic thin film transistors) to flexible displays such as AM-EPD (active matrix electrophoretic display) and AM-OLED (active matrix organic light emitting diode), and also to integrated circuits. The OTFTs using pentacene semiconductor layer and PVP gate dielectric and Au S/D electrodes exhibited good performance for AM-EPD with the mobility of $0.59\;cm^{2}/V.sec,$ and with also good uniformity over 2.5" diagonal area. However, it is nor enough for AM-OLED requiring the mobility larger than $1\;cm^{2}/V.sec$ for large area displays. The integrated circuits also worked, producing the operating frequency of 1MHz. We need to develop a fabrication process to reduce parasitic capacitance for high frequency operation.