• Title/Summary/Keyword: parallel computer processing

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Fast and Efficient Method for Fire Detection Using Image Processing

  • Celik, Turgay
    • ETRI Journal
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    • v.32 no.6
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    • pp.881-890
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    • 2010
  • Conventional fire detection systems use physical sensors to detect fire. Chemical properties of particles in the air are acquired by sensors and are used by conventional fire detection systems to raise an alarm. However, this can also cause false alarms; for example, a person smoking in a room may trigger a typical fire alarm system. In order to manage false alarms of conventional fire detection systems, a computer vision-based fire detection algorithm is proposed in this paper. The proposed fire detection algorithm consists of two main parts: fire color modeling and motion detection. The algorithm can be used in parallel with conventional fire detection systems to reduce false alarms. It can also be deployed as a stand-alone system to detect fire by using video frames acquired through a video acquisition device. A novel fire color model is developed in CIE $L^*a^*b^*$ color space to identify fire pixels. The proposed fire color model is tested with ten diverse video sequences including different types of fire. The experimental results are quite encouraging in terms of correctly classifying fire pixels according to color information only. The overall fire detection system's performance is tested over a benchmark fire video database, and its performance is compared with the state-of-the-art fire detection method.

A Fast and Precise Blob Detection

  • Nguyen, Thanh Binh;Chung, Sun-Tae
    • Proceedings of the Korea Contents Association Conference
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    • 2009.05a
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    • pp.23-29
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    • 2009
  • Blob detection is an essential ingredient process in some computer applications such as intelligent visual surveillance. However, previous blob detection algorithms are still computationally heavy so that supporting real-time multi-channel intelligent visual surveillance in a workstation or even one-channel real-time visual surveillance in a embedded system using them turns out prohibitively difficult. In this paper, we propose a fast and precise blob detection algorithm for visual surveillance. Blob detection in visual surveillance goes through several processing steps: foreground mask extraction, foreground mask correction, and connected component labeling. Foreground mask correction necessary for a precise detection is usually accomplished using morphological operations like opening and closing. Morphological operations are computationally expensive and moreover, they are difficult to run in parallel with connected component labeling routine since they need much different processing from what connected component labeling does. In this paper, we first develop a fast and precise foreground mask correction method utilizing on neighbor pixel checking which is also employed in connected component labeling so that the developed foreground mask correction method can be incorporated into connected component labeling routine. Through experiments, it is verified that our proposed blob detection algorithm based on the foreground mask correction method developed in this paper shows better processing speed and more precise blob detection.

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Development of Automated Surface Inspection System using the Computer V (컴퓨터 비젼을 이용한 표면결함검사장치 개발)

  • Lee, Jong-Hak;Jung, Jin-Yang
    • Proceedings of the KIEE Conference
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    • 1999.07b
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    • pp.668-670
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    • 1999
  • We have developed a automatic surface inspection system for cold Rolled strips in steel making process for several years. We have experienced the various kinds of surface inspection systems, including linear CCD camera type and the laser type inspection system which was installed in cold rolled strips production lines. But, we did not satisfied with these inspection systems owing to insufficient detection and classification rate, real time processing performance and limited line speed of real production lines. In order to increase detection and computing power, we have used the Dark Field illumination with Infra_Red LED, Bright Field illumination with Xenon Lamp, Parallel Computing Processor with Area typed CCD camera and full software based image processing technique for the ease up_grading and maintenance. In this paper, we introduced the automatic inspection system and real time image processing technique using the Object Detection, Defect Detection, Classification algorithms. As a result of experiment, under the situation of the high speed processed line(max 1000 meter per minute) defect detection is above 90% for all occurred defects in real line, defect name classification rate is about 80% for most frequently occurred 8 defect, and defect grade classification rate is 84% for name classified defect.

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Implementation of HMM-Based Speech Recognizer Using TMS320C6711 DSP

  • Bae Hyojoon;Jung Sungyun;Son Jongmok;Kwon Hongseok;Kim Siho;Bae Keunsung
    • Proceedings of the IEEK Conference
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    • summer
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    • pp.391-394
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    • 2004
  • This paper focuses on the DSP implementation of an HMM-based speech recognizer that can handle several hundred words of vocabulary size as well as speaker independency. First, we develop an HMM-based speech recognition system on the PC that operates on the frame basis with parallel processing of feature extraction and Viterbi decoding to make the processing delay as small as possible. Many techniques such as linear discriminant analysis, state-based Gaussian selection, and phonetic tied mixture model are employed for reduction of computational burden and memory size. The system is then properly optimized and compiled on the TMS320C6711 DSP for real-time operation. The implemented system uses 486kbytes of memory for data and acoustic models, and 24.5kbytes for program code. Maximum required time of 29.2ms for processing a frame of 32ms of speech validates real-time operation of the implemented system.

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GPU-Based ECC Decode Unit for Efficient Massive Data Reception Acceleration

  • Kwon, Jisu;Seok, Moon Gi;Park, Daejin
    • Journal of Information Processing Systems
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    • v.16 no.6
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    • pp.1359-1371
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    • 2020
  • In transmitting and receiving such a large amount of data, reliable data communication is crucial for normal operation of a device and to prevent abnormal operations caused by errors. Therefore, in this paper, it is assumed that an error correction code (ECC) that can detect and correct errors by itself is used in an environment where massive data is sequentially received. Because an embedded system has limited resources, such as a low-performance processor or a small memory, it requires efficient operation of applications. In this paper, we propose using an accelerated ECC-decoding technique with a graphics processing unit (GPU) built into the embedded system when receiving a large amount of data. In the matrix-vector multiplication that forms the Hamming code used as a function of the ECC operation, the matrix is expressed in compressed sparse row (CSR) format, and a sparse matrix-vector product is used. The multiplication operation is performed in the kernel of the GPU, and we also accelerate the Hamming code computation so that the ECC operation can be performed in parallel. The proposed technique is implemented with CUDA on a GPU-embedded target board, NVIDIA Jetson TX2, and compared with execution time of the CPU.

Molecular Interaction Interface Computing Based on Voxel Map (복셀맵을 기반으로 한 분자 간 상호작용 인터페이스의 계산)

  • Choi, Jihoon;Kim, Byungjoo;Kim, Ku-jin
    • Journal of the Korea Computer Graphics Society
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    • v.18 no.3
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    • pp.1-7
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    • 2012
  • In this paper, we propose a method to compute the interface between protein molecules. When a molecules is represented as a set of spheres with van der Waals radii, the distance from a spatial point p to the molecule corresponds to the distance from p to the closet sphere. The molecular interface is composed of equi-distant points from two molecules. Our algorithm decomposes the space into a set of voxels, and then constructs a voxel map by storing the information of spheres intersecting each voxel. By using the voxel map, we compute the distance between a point and the molecule. We also use GPU for the parallel processing, and efficiently approximate the interface of a pair of molecules.

Design of a Large-Scale Multicast Server System (대용량 멀티캐스트 서버 시스템의 설계)

  • 함진호
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.2 no.1
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    • pp.87-99
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    • 1998
  • In the multicasting communications, the quality of service is not guaranteed occasionally, according to the shortage of resources, because all resources such as communication buffer, processing power for the packet multiplication, and bandwidth, should be shared among each members. This problem can be solved through the hierarchical multicaster construction mechanism which guarantees that all multicaster can be operated within the required performance. This paper proposes the architecture of multipoint communication server based on hypercube type massively parallel computer. Through the simulation, it is verified that the traffic of links between each node of hypercube computer is under the some bandwidth. So, it is certified that the hypercube computer is suitable for the multicast communication servers supporting the various groups.

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Design of Parallel Rasterizer for 3D Graphics Accelerators (3D 그래픽 가속엔진을 위한 병렬 Rasterizer 설계)

  • O, In-Heung;Park, Jae-Seong;Kim, Sin-Deok
    • Journal of KIISE:Computer Systems and Theory
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    • v.26 no.1
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    • pp.82-97
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    • 1999
  • 3차원 그래픽 렌더링은 화면상의 각 화소에 대하여 색깔뿐만 아니라 깊이 정보가지 계산해야 하기 때문에 방대한 계산량과 메모리 접근, 그리고 데이터 전송량을 필요로 하기 때문이다. 따라서 실시간 3차원 그래픽 처리를 위해서 병렬 처리 기법을 도입한다. 그러나 기존 그래픽 가속엔진은 병렬처리 기법으로 영상-병렬성을 이용한 화면 분할 방식을 사용하기 때문에 크게 두 가지 단점이 발생한다. 첫 번재는 화면 영역의 경게에 위치하는 다각형들에 대한 중복계산이고, 두 번째는 낮은 PE(Processing Element) 활용도이다. 본 논문에서는 이러한 문제를 해결하기 위한 방법으로 객체 기반 렌더링(OBR : Object Based Rendering)방식을 바탕으로 하는 그래픽 가속엔진을 제안하였다. OBR 시스템의 목적은 화면 분할 방식의 불필요한 오버헤드를 제거하여 수행 성능을 높이고, 자원을 효율적으로 사용하여 하드웨어 구성비용을 줄이는 것이다. 본 논문에서는 시뮬레이션을 통하여 OBR 시스템이 화면 분할 방식의 대표적인 그래픽 가속기인 PixelFlow와의 성능을 상대적으로 비교하였다. 결론적으로 OBR 시스템은 화면 분할 방식보다 더 적은 하드웨어 자원으로 보다 효율적으로 렌더링을 수해하였다.

High-resolution Urban Flood Modeling using Cellular Automata-based WCA2D in the Oncheon-cheon Catchment in Busan, South Korea (셀룰러 오토마타 기반 WCA2D 모형을 이용한 부산 온천천 유역 고해상도 도시 침수 해석)

  • Choi, Hyeonjin;Lee, Songhee;Woo, Hyuna;Noh, Seong Jin
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.43 no.5
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    • pp.587-599
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    • 2023
  • As climate change increasesthe frequency and risk of flooding in major cities around theworld, the importance ofsimulation technology that can quickly and accurately analyze high-resolution 2D flooding information in large-scale areasis emerging. The physically-based approaches based on the Shallow Water Equations (SWE) often requires huge computer resources hindering high-resolution flood prediction. This study investigated the theoretical background of Weighted Cellular Automata 2D (WCA2D), which simulates spatio-temporal changes offlooding using transition rules and weight-based system, and assessed feasibility to simulate pluvial flooding in the urbancatchment, theOncheon-cheon catchmentinBusan, SouthKorea.Inaddition,the computation performancewas compared by applying versions using OpenComputing Language (OpenCL) andOpenMulti-Processing (OpenMP) parallel computing techniques. Simulationresultsshowed that the maximuminundation depthmap by theWCA2Dmodel cansimilarly reproduce historical inundation maps. Also, it can precisely simulate spatio-temporal changes of flooding extent in the urban catchment with complex topographic characteristics. For computation efficiency, parallel computing schemes, theOpenCLandOpenMP, improved the computation by about 8~14 and 5~6 folds respectively, compared to the sequential computation.

3D feature profile simulation for nanoscale semiconductor plasma processing

  • Im, Yeon Ho
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.61.1-61.1
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    • 2015
  • Nanoscale semiconductor plasma processing has become one of the most challenging issues due to the limits of physicochemical fabrication routes with its inherent complexity. The mission of future and emerging plasma processing for development of next generation semiconductor processing is to achieve the ideal nanostructures without abnormal profiles and damages, such as 3D NAND cell array with ultra-high aspect ratio, cylinder capacitors, shallow trench isolation, and 3D logic devices. In spite of significant contributions of research frontiers, these processes are still unveiled due to their inherent complexity of physicochemical behaviors, and gaps in academic research prevent their predictable simulation. To overcome these issues, a Korean plasma consortium began in 2009 with the principal aim to develop a realistic and ultrafast 3D topography simulator of semiconductor plasma processing coupled with zero-D bulk plasma models. In this work, aspects of this computational tool are introduced. The simulator was composed of a multiple 3D level-set based moving algorithm, zero-D bulk plasma module including pulsed plasma processing, a 3D ballistic transport module, and a surface reaction module. The main rate coefficients in bulk and surface reaction models were extracted by molecular simulations or fitting experimental data from several diagnostic tools in an inductively coupled fluorocarbon plasma system. Furthermore, it is well known that realistic ballistic transport is a simulation bottleneck due to the brute-force computation required. In this work, effective parallel computing using graphics processing units was applied to improve the computational performance drastically, so that computer-aided design of these processes is possible due to drastically reduced computational time. Finally, it is demonstrated that 3D feature profile simulations coupled with bulk plasma models can lead to better understanding of abnormal behaviors, such as necking, bowing, etch stops and twisting during high aspect ratio contact hole etch.

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