• Proceedings of the Korea Information Processing Society Conference
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• 2022.11a
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• pp.6-8
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• 2022

병렬처리시스템이 설계와 구축에서 가장 중요한 관점 중의 하나는 비용 대비 성능이다. 본 연구에서는 라즈베리파이 4를 클러스터 방식으로 연결하여 병렬처리 시스템을 구축하였을 때, 클러스터의 병렬처리 성능이 다른 병렬처리 시스템과 유사한 확장성과 병렬처리 성능을 보여주는지를 HPL 벤치마크를 통하여 검증하였다. 실험 결과 라즈베리파이 기반의 병렬처리 시스템이 클러스터의 크기에 따른 병렬 확장성이 있고, 다른 병렬처리 시스템들과 유사한 처리 성능을 가질 수 있음을 확인하였으며, 이를 통하여 라즈베리파이와 같은 저가의 처리장치로도 충분한 크기의 클러스터를 구성할 경우 높은 성능을 기대할 수 있음을 알 수 있다.

• The Transactions of the Korea Information Processing Society
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• v.3 no.7
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• pp.1680-1686
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• 1996

The deterministic update method of intensional predicates in a parallel deductive database that deductive database is distributed in a parallel computer architecture in needed. Using updated data from the deterministic update method, a strategy for parallel evaluation of intensional predicates is required. The paper is concerned with an approach to updating parallel deductive database in which very insertion or deletion can be performed in a deterministic way, and an extended parallel semi-naive evaluation algorithm in a parallel computer architecture. After presenting an approach to updating intensional predicates and strategy for parallel evaluation, its implementation is discussed. A parallel deductive database consists of the set of facts being the extensional database and the set of rules being the intensional database. We assume that these sets are distributed in each processor, research how to update intensional predicates and evaluate using the update method. The parallel architecture for the deductive database consists of a set of processors and a message passing network to interconnect these processors.

• Journal of Information Processing Systems
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• v.7 no.2
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• pp.271-286
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• 2011

In this paper, we propose efficient algorithms for parallel prefix computation and sorting on a recursive dual-net. The recursive dual-net $RDN^k$(B) for k > 0 has $(2n_o)^{2K}/2$ nodes and $d_0$ + k links per node, where $n_0$ and $d_0$ are the number of nod es and the node-degree of the base-network B, respectively. Assume that each node holds one data item, the communication and computation time complexities of the algorithm for parallel prefix computation on $RDN^k$(B), k > 0, are $2^{k+1}-2+2^kT_{comm}(0)$ and $2^{k+1}-2+2^kT_{comp}(0)$, respectively, where $T_{comm}(0)$ and $T_{comp}(0)$ are the communication and computation time complexities of the algorithm for parallel prefix computation on the base-network B, respectively. The algorithm for parallel sorting on $RDN^k$(B) is restricted on B = $Q_m$ where $Q_m$ is an m-cube. Assume that each node holds a single data item, the sorting algorithm runs in $O((m2^k)^2)$ computation steps and $O((km2^k)^2)$ communication steps, respectively.

• Journal of the Korea Society of Computer and Information
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• v.16 no.5
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• pp.1-11
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• 2011

As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements (PEs) and operates on a 3-stage pipelining. Experimental results indicated that the proposed parallel processor outperforms conventional parallel processors in terms of performance. In addition, our proposed parallel processor outperforms commercial high-performance TI C6416 DSP in terms of performance (1.4-31.4x better) and energy efficiency (5.9-8.1x better) with same 130nm technology and 720 clock frequency. The proposed parallel processor was developed with verilog HDL and verified with a FPGA prototype system.

• Proceedings of the Korean Society for Language and Information Conference
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• 2007.11a
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• pp.285-292
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• 2007

The parallel corpus is an important resource in the research field of data-driven natural language processing, but there are only a few parallel corpora publicly available nowadays, mostly due to the high labor force needed to construct this kind of resource. A novel strategy is brought out to automatically fetch parallel text from the web in this paper, which may help to solve the problem of the lack of parallel corpora with high quality. The system we develop first downloads the web pages from certain hosts. Then candidate parallel page pairs are prepared from the page set based on the outer features of the web pages. The candidate page pairs are evaluated in the last step in which the sentences in the candidate web page pairs are extracted and aligned first, and then the similarity of the two web pages is evaluate based on the similarities of the aligned sentences. The experiments towards a multilingual web site show the satisfactory performance of the system.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.10
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• pp.4948-4967
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• 2017

On mobile devices, image sequences are widely used for multimedia applications such as computer vision, video enhancement, and augmented reality. However, the real-time processing of mobile devices is still a challenge because of constraints and demands for higher resolution images. Recently, heterogeneous computing methods that utilize both a central processing unit (CPU) and a graphics processing unit (GPU) have been researched to accelerate the image sequence processing. This paper deals with various optimizing techniques such as parallel processing by the CPU and GPU, distributed processing on the CPU, frame buffer object, and double buffering for parallel and/or distributed tasks. Using the optimizing techniques both individually and combined, several heterogeneous computing structures were implemented and their effectiveness were analyzed. The experimental results show that the heterogeneous computing facilitates executions up to 3.5 times faster than CPU-only processing.

• Proceedings of the Korea Information Processing Society Conference
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• 2016.10a
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• pp.50-53
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• 2016

Image processing techniques play an increasingly important role in many aspects of our daily life. For example, it has been shown to improve agricultural productivity in a number of ways such as plant pest detecting or fruit grading. However, massive quantities of images generated in real-time through multi-devices such as remote sensors during monitoring plant growth lead to the challenges of big data. Meanwhile, most current image processing systems are designed for small-scale and local computation, and they do not scale well to handle big data problems with their large requirements for computational resources and storage. In this paper, we have proposed an IPABigData (Image Processing Algorithm BigData) platform which provides algorithms to support large-scale image processing in agriculture based on Hadoop framework. Hadoop provides a parallel computation model MapReduce and Hadoop distributed file system (HDFS) module. It can also handle parallel pipelines, which are frequently used in image processing. In our experiment, we show that our platform outperforms traditional system in a scenario of image segmentation.

• Proceedings of the Korea Information Processing Society Conference
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• 2007.11a
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• pp.630-633
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• 2007

클러스터를 이용하여 다수의 작업을 실행시키는 경우에 효율적으로 사용자들이 자원을 사용하기 위해서는 작업 스케줄링이 매우 중요하다. 다양한 스케줄링 방법들이 제안되었으며 그 중 효율적으로 병렬 작업을 스케쥴링하기 위해 제안된 방법으로는 backfilling, co-scheduling, gang scheduling을 들 수 있다. 이러한 연구에서는 이론적인 논의가 많았고, 실제로 구현을 했다고 하더라고 multiprocessor 를 대상으로 backfilling 을 다룬 내용이 대부분이었다. 이 논문은 클러스터상에서의 parallel job scheduling 에 대해 조사하였다.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.2
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• pp.76-84
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• 2014

As the number of high-density videos increase, parallel processing approaches are necessary to process a large-scale of video data. When a processing method of video data requires thousands of simple operations, GPU-based parallel processing is preferred to CPU-based parallel processing by way of reducing the time and space complexities of a given computation problem. This paper studies the parallel design and implementation of a shot-boundary detection algorithm. The proposed shot-boundary detection algorithm uses pixel brightness comparisons and global histogram data among the blocks of frames, and the computation of these data is characterized with the high parallelism for the related operations. In order to maximize these operations in parallel, the computations of the pixel brightness and histogram are designed in parallel and implemented in NVIDIA GPU. The GPU-based shot detection method is tested with 10 videos from the set of videos in National Archive of Korea. In experiments, the detection rate is similar but the computation time is about 10 time faster to that of the CPU-based algorithm.

• Proceedings of the KWS Conference
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• 2002.10a
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• pp.314-319
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• 2002

The Automation and Control Group at the University of Brasilia is developing an automatic welding station based on an industrial robot and a controllable welding machine. Several techniques were applied in order to improve the quality of the welding joints. This paper deals with the implementation of a laser-based computer vision system to guide the robotic manipulator during the welding process. Currently the robot is taught to follow a prescribed trajectory which is recorded a repeated over and over relying on the repeatability specification from the robot manufacturer. The objective of the computer vision system is monitoring the actual trajectory followed by the welding torch and to evaluate deviations from the desired trajectory. The position errors then being transfer to a control algorithm in order to actuate the robotic manipulator and cancel the trajectory errors. The computer vision systems consists of a CCD camera attached to the welding torch, a laser emitting diode circuit, a PC computer-based frame grabber card, and a computer vision algorithm. The laser circuit establishes a sharp luminous reference line which images are captured through the video camera. The raw image data is then digitized and stored in the frame grabber card for further processing using specifically written algorithms. These image-processing algorithms give the actual welding path, the relative position between the pieces and the required corrections. Two case studies are considered: the first is the joining of two flat metal pieces; and the second is concerned with joining a cylindrical-shape piece to a flat surface. An implementation of this computer vision system using parallel computer processing is being studied.