• Title/Summary/Keyword: parallel computer processing

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PDFindexer: Distributed PDF Indexing system using MapReduce

  • Murtazaev, JAziz;Kihm, Jang-Su;Oh, Sangyoon
    • International Journal of Internet, Broadcasting and Communication
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    • v.4 no.1
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    • pp.13-17
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    • 2012
  • Indexing allows converting raw document collection into easily searchable representation. Web searching by Google or Yahoo provides subsecond response time which is made possible by efficient indexing of web-pages over the entire Web. Indexing process gets challenging when the scale gets bigger. Parallel techniques, such as MapReduce framework can assist in efficient large-scale indexing process. In this paper we propose PDFindexer, system for indexing scientific papers in PDF using MapReduce programming model. Unlike Web search engines, our target domain is scientific papers, which has pre-defined structure, such as title, abstract, sections, references. Our proposed system enables parsing scientific papers in PDF recreating their structure and performing efficient distributed indexing with MapReduce framework in a cluster of nodes. We provide the overview of the system, their components and interactions among them. We discuss some issues related with the design of the system and usage of MapReduce in parsing and indexing of large document collection.

Evaluation of Cluster-Based System for the OLTP Application

  • Hahn, Woo-Jong;Yoon, Suk-Han;Lee, Kang-Woo;Dubois, Michel
    • ETRI Journal
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    • v.20 no.4
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    • pp.301-326
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    • 1998
  • In this paper, we have modeled and evaluated a new parallel processing system called Scalable Parallel computer Architecture based on Xbar (SPAX) for commercial applications. SMP systems are widely used as servers for commercial applications; however, they have very limited scalability. SPAX cost-effectively overcomes the SMP limitation by providing both scalability and application portability. To investigate whether the new architecture satisfies the requirements of commercial applications, we have built a system model and a workload model. The results of the simulation study show that the I/O subsystem becomes the major bottleneck. We found that SPAX can still meet the I/O requirement of the OLTP workload as it supports flexible I/O subsystem. We also investigated what will be the next most important bottleneck in SPAX and how to remove it. We found that the newly developed system network called Xcent-Net will not be a bottleneck in the I/O data path. We also show the optimal configuration that is to be considered for system tuning.

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Scalable Multi-view Video Coding based on HEVC

  • Lim, Woong;Nam, Junghak;Sim, Donggyu
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.6
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    • pp.434-442
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    • 2015
  • In this paper, we propose an integrated spatial and view scalable video codec based on high efficiency video coding (HEVC). The proposed video codec is developed based on similarity and uniqueness between the scalable extension and 3D multi-view extension of HEVC. To improve compression efficiency using the proposed scalable multi-view video codec, inter-layer and inter-view predictions are jointly employed by using high-level syntaxes that are defined to identify view and layer information. For the inter-view and inter-layer predictions, a decoded picture buffer (DPB) management algorithm is also proposed. The inter-view and inter-layer motion predictions are integrated into a consolidated prediction by harmonizing with the temporal motion prediction of HEVC. We found that the proposed scalable multi-view codec achieves bitrate reduction of 36.1%, 31.6% and 15.8% on the top of ${\times}2$, ${\times}1.5$ parallel scalable codec and parallel multi-view codec, respectively.

A Message Transfer Scheme for Efficient Message Passing in the Highly Parallel Computer SPAX (고속병렬컴퓨터(SPAX)에서의 효율적인 메시지 전달을 위한 메시지 전송 기법)

  • 모상만;신상석;윤석한;임기욱
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.9
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    • pp.1162-1170
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    • 1995
  • In this paper, we present a message transfer scheme for efficient message passing in the hierarchically structured multiprocessor computer SPAX(Scalable Parallel Architecture computer based on X-bar network). The message transfer scheme provides interface not only with operating system but also with end users. In order to transfer two types of control message and data message efficiently, it supports both of memory-mapped transfer and DMA-based transfer. Dual-port RAMs are used as message buffers, and control and status registers provide efficient programming interface. Interlaced parity scheme is adopted for error control. If any error is detected at receiving node, errored packet is resent by sender according to retry mechanism. In conjunction with retry mechanism, watchdog timers are used to protect infinite waiting and repeated retry. The proposed message transfer scheme can be applied to input/output nodes and communication connection nodes as well as processing nodes in the SPAX.

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Architecture of General and Intelligent Parallel Processing System (범용성과 지능성을 갖는 병렬 처리기 구조)

  • Lee, Hyung;Choi, Sung-Hyuk;Kim, Jung-Bae;Park, Jong-Won
    • Annual Conference of KIPS
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    • 2000.10a
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    • pp.601-604
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    • 2000
  • 본 논문에서는 방대한 양의 영상데이터를 실시간으로 처리하기 위해 제안된 Park's 다중접근 기억장치를 이용한 SIMD 병렬 처리기 시스템의 효율성을 높이기 위하여 Semi-MIMD 구조를 갖는 병렬처리기 시스템을 제안한다.

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Implementation of Pipeline-Based Parallel Processing Library (파이프라인 기반의 병렬처리 라이브러리 구현)

  • Ha, Seungu
    • Annual Conference of KIPS
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    • 2021.11a
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    • pp.453-456
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    • 2021
  • 본 논문에서는 fork-join과 work stealing을 이용하여 동적 병렬처리를 수행하는 라이브러리를 구현하였다. 이 라이브러리는 병렬처리를 직관적으로 할 수 있는 함수형 프로그래밍 스타일의 파이프라인 API를 제공한다. 이를 이용한 성능 테스트에서 멀티코어를 제대로 활용하는 결과를 얻을 수 있었다. 마지막으로 blocking 작업 실행 시 병렬성 유지를 위해 추가로 개선할 수 있는 방법을 제시한다.

Intelligent Parallel Iterative Methods for Solving Linear Systems of Equations with Large Sparse Matrices (대형 스파스 행렬로 표현되는 선형시스템 방정식의 해를 구하기 위한 지능적 병렬 반복법)

  • Chae, Soo-Hoan;Kim, Myung-Kyu
    • Journal of Advanced Navigation Technology
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    • v.13 no.1
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    • pp.62-67
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    • 2009
  • The demand for high performance computer grows to solve large linear systems of equations in such engineering fields - circuit simulation for VLSI design, image processing, structural engineering, aerodynamics, etc. Many various parallel processing systems have been proposed and manufactured to satisfy the demand. The properties of linear system determine what algorithm is proper to solve the problem. Direct methods or iterative methods can be used for solving the problem. In this paper, an intelligent parallel iterative method for solving linear systems of equations with large sparse matrices is proposed and its efficiency is proved through simulation.

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An Optimized Approach of Fault Distribution for Debugging in Parallel

  • Srivasatav, Maneesha;Singh, Yogesh;Chauhan, Durg Singh
    • Journal of Information Processing Systems
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    • v.6 no.4
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    • pp.537-552
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    • 2010
  • Software Debugging is the most time consuming and costly process in the software development process. Many techniques have been proposed to isolate different faults in a program thereby creating separate sets of failing program statements. Debugging in parallel is a technique which proposes distribution of a single faulty program segment into many fault focused program slices to be debugged simultaneously by multiple debuggers. In this paper we propose a new technique called Faulty Slice Distribution (FSD) to make parallel debugging more efficient by measuring the time and labor associated with a slice. Using this measure we then distribute these faulty slices evenly among debuggers. For this we propose an algorithm that estimates an optimized group of faulty slices using as a parameter the priority assigned to each slice as computed by value of their complexity. This helps in the efficient merging of two or more slices for distribution among debuggers so that debugging can be performed in parallel. To validate the effectiveness of this proposed technique we explain the process using example.

The Parallel Processing User Decryption and User Password Management based the Password in Electronic Commerce (EC에서 패스워드를 기반으로 한 병렬처리 사용자 암호해독 및 패스워드 관리에 관한 연구)

  • Jung, Chang-Ryul;Kim, Dan-Hwan;Koh, Jin-Gwang
    • Annual Conference of KIPS
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    • 2002.11c
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    • pp.2351-2354
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    • 2002
  • 전자상거래의 인구는 매년 급속히 증가하고 있으며, 또한 전자상거래의 대다수 쇼핑몰 사이트가 패스워드를 기반으로 사용자를 인증하고 있다. 그런데 사용자는 이런 패스워드 기반 사이트를 방문하면서 보안과 안전을 고려하지 않고 패스워드를 만들어서 사용하고 있다. 이러한 패스워드는 사용자의 프라이버시의 침해와 개인정보가 노출이 되는 문제를 안고 있다. 이러한 문제점을 관리적 측면에서 패스워드를 해독하여 해독하기 쉬운 일반적이고 평이한 패스워드를 사용자는 mail를 통해 알려서 패스워드의 위험성을 주지시키도록 한다. 사용자의 패스워드를 알기 위해서는 암호해독 기법이 필요 하는데 이 해독기법을 빠르고 정확하게 하기 위해서 분산화 된 동적 작업배분방법을 이용한 병렬처리 패스워드 해독 기법을 제안하여 구현하였다. 본 연구에서는 이러한 암호해독을 하여 진자상거래에서 사용자가 사용한 패스워드를 안전하게 관리할 수 있도록 하고, 사용자의 프라이버시를 효과적으로 보호 할 수 있는 모델을 제안한다.

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A Modified Thinning Algorithm Using Parallel Processing Method (개선된 병렬적 처리 방식의 세선화 알고리즘)

  • Lee, Keon-Ik;Cha, Sung-Yoon;Kim, Sung-Nak
    • Annual Conference of KIPS
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    • 2003.11a
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    • pp.519-522
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    • 2003
  • 이 논문에서는 특징점 정보를 이용하여 기존의 병렬 세선화 알고리즘을 개선하는 방법을 제안하였다. 자동 지문 인식 시스템에서 특징점을 정확히 검출하기 위해서 지문영상의 세선화는 매우 중요한 부분을 차지한다. 이 논문에서는 기존 병렬 세선화 알고리즘에 픽셀의 연결성을 이용한 알고리즘을 추가하여 세선화를 수행하였다. 제안 방법의 성능평가를 위하여 이진 지문 영상을 사용하여 기존 방법과 비교하였으며 실험결과 세선화 정도가 우수함을 알 수 있었다.

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