• Proceedings of the Korea Society for Simulation Conference
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• 2003.11a
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• pp.147-151
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• 2003

Yield enhancement in semiconductor fabrication is important. Even though DRAM yield loss may be attributed to many problems, the existence of defects on the wafer is one of the main causes. When the defects on the wafer form patterns, it is usually an indication for the identification of equipment problems or process variations. In this paper describes the techniques to automatically classify a failure pattern using a fail bit map.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.42 no.1
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• pp.1-11
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• 2005

Several Solid Freeform Fabrication Systems(SFFS) are commercialized in a few companies for rapid prototyping. However, they have many technical problems including the limitation of applicable materials. A new method of agile prototyping is required for the recent manufacturing environments of multi-item and small quantity production. The objectives of this paper include the development of a novel method of SFFS, the CAFL/sup VM/(Computer Aided Fabrication of Lamination for Various Material), and the manufacture of the various material samples for the certification of the proposed system and the creation of new application areas. For these objectives, the technologies for a highly accurate robot path control, the optimization of support structure, CAD modeling, adaptive slicing was implemented. However, there is an important problem with the conventional 2D lamination method. That is the inaccuracy of 3D model surface, which is caused by the stair-type surface generated in virtue of vertical 2D cutting. In this paper, We design the new control algorithm that guarantees the constant speed, precise positioning and tangential cutting on the 5DOF SFFS. We develop the tangential cutting algorithm to be controlled with constant speed and successfully implemented in the 5DOF CAFL/sup VM/ system developed in this paper. Finally, this paper confirms its high-performance through the experimental results from the application into CAFL/sup VM/ system.

• Smart Structures and Systems
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• v.1 no.1
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• pp.63-82
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• 2005

This paper introduces a technology for robust and low maintenance cost sensor network capable to detect accelerations below a micro-g in a wide frequency bandwidth (above 1,000 Hz). Sensor networks with such performance are critical for navigation, seismology, acoustic sensing, and for the health monitoring of civil structures. The approach is based on the fabrication of an array of high sensitivity accelerometers, each utilizing Fabry-Perot cavity with wavelength-dependent reflectivity to allow embedded optical detection and serialization. The unique feature of the approach is that no local power source is required for each individual sensor. Instead one global light source is used, providing an input optical signal which propagates through an optical fiber network from sensor-to-sensor. The information from each sensor is embedded onto the transmitted light as an intrinsic wavelength division multiplexed signal. This optical "rainbow" of data is then assessed providing real-time sensing information from each sensor node in the network. This paper introduces the Fabry-Perot based accelerometer and examines its critical features, including the effects of imperfections and resolution estimates. It then presents serialization techniques for the creation of systems of arrayed sensors and examines the effects of serialization on sensor response. Finally, a fabrication process is proposed to create test structures for the critical components of the device, which are dynamically characterized.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.2039-2040
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• 2006

Persistent current switch (PCS) system in NMR, MRI, MAGLEV and SMES has many advantages, such as uniformity and durability of magnetic field and reducing a thermal loss, which enable many superconducting application to operate effectively. This paper deals with fabrication and test of heater trigger persistent current switch using coated conductor (CC) which has high n-index, critical current independency from external magnetic field and adaptable selectivity of stabilizer. PCS system consists of magnet power supply for energizing current to a magnet, heater, switch and magnet using coated conductor tape. Finite element method (FEM) is used to simulate thermal quench (switching) characteristic and design heater trigger. With FEM simulation, optimal length of heater is calculated by temperature and time analysis. Fabrication of PCS system and test of heater trigger characteristic were performed and compared with simulation result. This paper would be the foundation of researches of superconducting switching application.

• Korean Journal of Computational Design and Engineering
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• v.11 no.3
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• pp.223-233
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• 2006

Layered manufacturing(LM) is emerging as a new technology that enables the fabrication of three dimensional heterogeneous objects such as Multi-materials and Functionally Gradient Materials (FGMs). Among various types of heterogeneous objects, more attention has recently paid on the fabrication of FGMs because of their potentials in engineering applications. The necessary steps for LM fabrication of FGMs include representation and process planning of material information inside an FGM. This paper introduces a new process planning algorithm that takes into account the processing of material information. The detailed tasks are discretization (i.e., decomposition-based approximation of volume fraction), orientation (build direction selection), and adaptive slicing of heterogeneous objects. In particular, this paper focuses on the discretization process that converts all of the material information inside an FGM into material features like geometric features. It is thus possible to choose an optimal build direction among various pre-selected ones by approximately estimating build time. This is because total build time depends on the complexity of features. This discretization process also allows adaptive slicing of heterogeneous objects to minimize surface finish and material composition error. In addition, tool path planning can be simplified into fill pattern generation. Specific examples are shown to illustrate the overall procedure.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.12
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• pp.1077-1083
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• 2014

Multi-material Additive Manufacturing (AM) is being focused to apply for direct manufacturing of a product. In this paper, a three-dimensional circuit device (3DCD) fabrication technology based on the multi-material AM technology was proposed. In contrast with conventional two-dimensional Printed Circuit Board (PCB), circuit elements and conducting wires of 3DCD are placed in threedimensional configuration at multiple layers of the structure. Therefore, 3DCD technology can improve design freedom of an electronic product. In this paper, 3DCD technology is proposed based on AM technology. Two types of 3DCD fabrication systems were developed based on the Stereolithography and the Fused Deposition Modeling technologies. And the 3DCD samples which have same function were fabricated, successfully.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.143-144
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• 2006

In this paper, we proposed XP KMPR-1050 negative tone resist to replace SU-8 resist for multi-layer micro-structures and thick plating mold fabrication using UV-LIGA process. XP KMPR resist proposed in this paper can be easily striped using a common stripping solution such as NMP without damage of micro-structure. The conditions for the fabrication of XP KMPR micro-structure were optimized by adjustment of exposure and post-exposure bake(PEB). The $140{\mu}m$ -thick and an aspect ratio at least 10 micro-structure and multi-layer structures were successfully fabricated through the process conditions. Through-mold electroplating and PR striping of XP KMPR has been successfully demonstrated.

• 한국신재생에너지학회:학술대회논문집
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• 2010.11a
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• pp.86.2-86.2
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• 2010

In order to improve polymer electrolyte membrane fuel cell (PEMFC) durability, the durability of membrane electrode assemblies (MEA), in which the electrochemical reactions actually occur, is one of the vital issues. Many articles have dealt with catalyst layer degradation of the durability-related factors on MEAs in relation to loss of catalyst surface area caused by agglomeration, dissolution, migration, formation of metal complexes and oxides, and/or instability of the carbon support. Degradation of catalyst layer during long-term operation includes cracking or delamination of the layer which result either from change in the catalyst microstructure or loss of electronic or ionic contact with the active surface, can result in apparent activity loss in the catalyst layer. Membrane degradation of the durability-related factors on MEAs can be caused by mechanical or thermal stress resulting in formation of pinholes and tears and/or by chemical attack of hydrogen peroxide radicals formed during the electrochemical reactions. All of these effects, the mechanical damage of membrane and degradation of catalyst layers are more facilitated by uneven stress or improper MEA fabrication process. In order to improve the PEMFC durability, therefore, it is most important to minimize the uneven stress or improper MEA fabrication process in the course of the fabrication of MEA. We analyzed the effects of the MEA fabrication condition on the PEMFC durability with MEA produced using CCM (catalyst coated membrane) method. This paper also investigated the effects of MEA fabrication condition on the PEMFC durability by adding additional treatment process, hot pressing and pressing, on the MEA produced using CCM method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.12
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• pp.102-107
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• 2007

This paper proposes a H.264/AVC entropy decoder without embedded processor nor memory fabrication process. Many researches on H.264/AVC entropy decoders require ROM or RAM fabrication process, which is difficult to be implemented in general digital logic fabrication process. Furthermore, many researches require embedded processors for bitstream manipulation, which increases area and power consumption. This papers proposes hardwired H.264/AVC entropy decoder without embedded processor, which improves data processing speed and reduces power consumption. Furthermore, its CAVLC decoder optimizes lookup table and internal buffer without embedded memory, which reduces hardware size and can be implemented in general digital logic fabrication process without ROM or RAM fabrication process. Designed entropy decoder was embedded in H.264/AVC video decoder, and it was verified to operate correctly in the system. Synthesized in TSMC 90nm fabrication process, its maximum operation frequency is 125MHz. It supports QCIF, CIF, and QVGA image format. Under slight modification of nC register and other blocks, it also support VGA image format.

• Journal of Sensor Science and Technology
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• v.30 no.5
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• pp.337-341
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• 2021

In this paper, we describe the fabrication of a paper-based enzyme-linked immunosorbent assay (ELISA) to detect polygalacturonase (PG), which is used as a biomarker to determine whether a plant is infected with a disease. The proposed paper-based ELISA can analyze the concentration of PG in a short time using a small sample compared to the traditional ELISA, which is generally performed using a well plate. To increase the resolution of the sensor, we optimized the dilution ratio of the HRP-conjugated goat anti-rabbit IgG antibody and the dilution ratio of the anti-PG and HRP-conjugated goat anti-rabbit IgG antibodies. Furthermore, for quantitative analysis of PG concentration, Delta RGB analysis was conducted to detect color changes in the sensing window displayed by the PG samples at various concentrations. Based on the experiment, the fabricated paper-based ELISA could measure at least 0.25 ㎍ of PG and the measurement range was 0.25-2 ㎍. Therefore, the paper-based ELISA for detecting PG is expected to be able to determine the presence or absence of disease in crops at the infection stage in the future.