• Journal of Engineering Education Research
• /
• v.2 no.1
• /
• pp.10-16
• /
• 1999

In this paper, we developed the internet-based educational software package (DVLab) for design and virtual experiment of the digital logic circuits. The DVLab consists of the LogicSim module for design and simulation of digital combinational/sequantial logic circuits, micro-controller application circuits and the BreadBoard module for virtual experiment and the Theory module for lecture and the Report/ReportChecker module and some other utility modules. All developed modules can be run as application programs as well as applets in the Internet. The LogicSim and the BreadBoard support real time clock function, output verification function on the designed circuits, trace function of logic values, copy-protection function of designed circuits and provide various devices including logic gates, TTLs, LED, buzzer, and micro-controller. The educational model of digital logic circuit design and experiment using the DVLab is also presented in this paper.

• Korean Journal of Optics and Photonics
• /
• v.18 no.4
• /
• pp.235-240
• /
• 2007

A ceramic stem based TO package incorporating a coplanar waveguide feed-line has been proposed allowing for 10 Gbps grade data transmission. The frequency response of a cylindrical feed-line fer a conventional metal based TO package was first analyzed, and compared with that of the CPW feed-line used for a ceramic based package such as a butterfly package. For the case where a DFB LD chip is packaged to an LD module, the measured 3 dB frequency bandwidths for the conventional and proposed packages were 3.5 GHz and 7.8 GHz respectively, which agree well with the theoretical results obtained from the modeling based on the small signal equivalent circuits. Consequently, we proposed a novel ceramic based TO package with a CPW feed-line in ceramic material as a stem to improve the frequency characteristics of the conventional one. And, its performance was theoretically observed to confirm that the proposed package provides even wider frequency bandwidth compared to the conventional one.

• Journal of Fisheries and Marine Sciences Education
• /
• v.16 no.2
• /
• pp.210-217
• /
• 2004

Cooling technology has been a vital prerequisite for the rapid, if not explosive, growth of the electronic equipment industry. This has been especially true during the last 20 years with the advent of intergrated circuit chips and their applications in computers and related electronic products. The purpose of this study is to develop a telecommunication equipment cooling system using a thermoelectric module combined with cooling fan. Thermoelectric module is a device that can perform cooling only by input of electric power. In the present study, the cooling package using the thermoeletric module has been developed to improve the thermal performance. The cooling characteristics of the electronic chip was placed into the subrack and it can be rapidly assembled or disassembled in the equipment rack. As a preliminary experiment, the cooling performances between a conventional way using a cooling fin and a proposed method applying the thermoelectric module was comosed and analyzyed. The cooling performance at a simulated electronic component packaging a thermomodule operated well.

• Journal of the Korean Society for Precision Engineering
• /
• v.13 no.5
• /
• pp.95-103
• /
• 1996

This paper describes a computer aided design system for spur and helical gears. To establish the appropriate program, an integrate approach based on a rule-base system was adopted. This system is implemented on the personal computer and its environment is a commercial CAD package called AutoCAD. This system includes a main program and five sub-modules such as data input module, tooth profile drawing module, strength calculation module, and drawing edit module. In the main program, all the sub-modules are loaded and the type of gear and tooth profile are selected. In the data input module, the variables which are necessary to the design of gear are selected from the database. In the drawing module, from the calculated results, the required gear tooth is produced on the screen. The developed system that aids gear designer provides powerful capabilities for gear design.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2008.06a
• /
• pp.207-208
• /
• 2008

• The Optical Journal
• /
• s.117
• /
• pp.23-25
• /
• 2008

RF embedded 기판의 기술은 Module과 Package라는 응용 제품을 거치면서 최종적으로는 기존의 여러 가지 제품의 Mother Board(특히 휴대폰)에 접목 시키기 위한 노력이 계속 진행되고 있다. 업계 및 Research 기관의 조사 결과에 따르면 PCB 시장의 성장세와 맞물려 Embedded 시장규모는 큰 폭의 상승이 예상된다. 본 고에서는 높은 유전율을 가지는 강유전체 물질의 Embedded capacitor 적용을 위해 레이저 기술을 전자부품 제조현장에 적용하는 연구의 진행상황을 소개하고자 한다.

• The monthly packaging world
• /
• s.349
• /
• pp.65-81
• /
• 2022

• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.35D no.10
• /
• pp.91-97
• /
• 1998

The modulation performance of 10 Gbps electro-absorption InGaAsP/InGaAsP strain compensated MQW (Multiple Quantum Well) modulator module depends on the modulator as well as the package parasitics. The high frequency package parasitics resulting from various structural discontinuities, limit the modulation bandwidth and increase the chirp-parameter. Therefore, we propose the double bondwires embedded in dielectric materials to minimize the bondwire parasitics. Using the proposed structure with 50 $\Omega$ terminating resistor, the modulation bandwidth is greatly increased by 125 % than the bare chip and the chirp-parameter is also reduced. This technique can be used in optimizing the package of high speed external modulators.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2007.05a
• /
• pp.909-917
• /
• 2007

Recently the trend of automobile industry is that IQS evaluation index against a sensitivity quality is increasing. To reduce rattle noise due to speaker sound at low frequencies, it is required the advanced investigation of a package tray panel and a door module panel. This paper optimized the design parameters of package tray panel according to the theoretical background about robust design and suggested the design guideline for resonance avoidance and the reduction of vibrational sensitivity considering the excitation frequency of woofer speaker. In addition, it is suggested the design guideline of a door module panel through the sensitivity analysis in case of the speaker excitation. Finally, the design factor analysis of the quality deviation of a mother-car will make it possible to guarantee the stable characteristics of vehicle vibration in the early stage of vehicle development. These improvements can lead to shortening the time needed to develop better vehicles.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2003.11a
• /
• pp.53-58
• /
• 2003

The Wafer Level Packaging is one of the most important technologies in the semiconductor industry today. Its primary advantages are its small form factor and low cost potential for manufacturing including test procedure. The CASIO's WLP samples, application example and the structure are shown in Fig.1, 2&3. There are dielectric layer , under bump metal, re-distribution layer, copper post , encapsulation material and terminal solder .The key technologies are 'Electroplating thick copper process' and 'Unique wafer encapsulation process'. These are very effective in getting electrical and mechanical advantages of package. (Fig. 4). CASIO and CMK are developing a new System Packaging technology called the Embedded Wafer Level Package (EWLP) together. The active components (semiconductor chip) in the WLP structure are embedded into the Printed Wiring Board during their manufacturing process. This new technical approach has many advantages that can respond to requirements for future mobile products. The unique feature of this EWLP technology is that it doesn't contain any solder interconnection inside. In addition to improved electrical performance, EWLP can enable the improvement of module reliability. (Fig.5) The CASIO's WLP Technology will become the effective solution of 'KGD problem in System Packaging'. (Fig. 6) The EWLP sample shown in Fig.7 including three chips in the WLP form has almost same structure wi_th SoC's. Also, this module technology are suitable for RF and Analog system applications. (Fig. 8)