• Journal of the Korean Institute of Telematics and Electronics
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• v.14 no.1
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• pp.15-22
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• 1977

We have obtained a violet-sensitive photocell as a part of the developing project on such type of solar cell. The photocell has the structure of SnO2-SiO2-Si MOS coupled on Si n-p homojuction. It is not relevant to use as a solar cell because of its small photovoltaic power(0.25V, 150$mutextrm{A}$), however, since the spectral response of the cell is shifted toward the violet band region and its switching speed is fairly high in comparison with those of the Si p-n homojunction type solar cell, it is expected that we will be able to find mere novel utilities than the ordinary silicon photocell.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.3
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• pp.202-206
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• 2007

ZnO is a promising material to make high efficient ultraviolet(UV) or blue light emitting diodes(LEDs) because of its large binding energy and energy bandgap. In this study, we prepared ZnO thin films with p-type conductivity on silicon(100) substrates by RF magnetron sputtering in the mixture of $N_2$ and $O_2$. The process was accompanied by low pressure in-situ annealing in $O_2$ at $600^{\circ}C$ and $800^{\circ}C$ respectively. Hall effect in Van der Pauw configuration showed that the N-doped ZnO film annealed at $800^{\circ}C$ has p-type conductivity. Photoluminescence(PL) spectrum of the film annealed at $800^{\circ}C$ showed UV emission related to exciton and bound to donor-acceptor pair(DAP) as well as visible emission related to many intrinsic defects.

• 한국태양에너지학회:학술대회논문집
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• 2011.11a
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• pp.245-248
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• 2011

Many researches have been carried out to improve light absorption in the crystalline silicon solar cell fabrication. The rear reflection is applied to increase the path length of light, resulting in the light absorption enhancement and thus the efficiency improvement mainly due to increase in short circuit current. In this paper, we manufactured the silicon solar cell using the mono crystalline silicon wafers with $156{\times}156mm^2$, 0.5~3.0 ${\Omega}{\cdot}cm$ of resistivity and p-type. After saw damage removal, the dielectric film ($SiN_x$)on the back surface was deposited, followed by surface texturing in the KOH solution. It resulted in single-side texturing wafer. Then the dielectric film was removed in the HF solution. The silicon wafers were doped with phosphorus by $POCl_3$ with the sheet resistance 50 ${\Omega}/{\Box}$ and then the silicon nitride was deposited on the front surface by the PECVD with 80nm thickness. The electrodes were formed by screen-printing with Ag and Al paste for front and back surface, respectively. The reflectance and transmittance for the single-sided and double-sided textured wafers were compared. The double-sided textured wafer showed higher reflectance and lower transmittance at the long wavelength region, compared to single-sided. The completed crystalline silicon solar cells with different back surface texture showed the conversion efficiency of 17.4% for the single sided and 17.3% for the double sided. The efficiency improvement with single-sided textured solar cell resulted from reflectance increase on back surface and light absorption enhancement.

• Journal of Satellite, Information and Communications
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• v.11 no.4
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• pp.21-26
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• 2016

The ESD(electrostatic discharge) protection performance of PPS(PMOS pass structure) embedded N-type silicon controlled rectifier(NSCR_PPS) device with different implant of channel blocking region was discussed for high voltage I/O applications. A conventional NSCR standard device shows low on-resistance, low snapback holding voltage and low thermal breakdown voltage, which may cause latch-up problem during normal operation. However, our proposed NSCR_PPS devices with modified channel blocking structure demonstrate the improved ESD protection performance as a function of channel implant variation. Therefore, the channel blocking implant was a important parameter. Since the modified device with CPS_PDr+HNF structure satisfied the design window, we confirmed the applicable possibility as a ESD protection device for high voltage operating microchips.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.109-112
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• 2007

In this paper we describe a robust method of improving precision in monitoring high energy ion implantation processes. Ion implant energy accuracy was measured in the device manufacturing process using an unpatterned implanted layer on an intrinsic p-type silicon wafer. To increase Rs sensitivity to energy at the well implant process, a PN junction structure was formed by P-well and deep N-well implants into the p-type Si wafer. It was observed that the depletion layer formed by the PN junction was very sensitive to energy variation of the well implant. Conclusively, it can be recommended to monitor well implant processes using the Rs measurement method described herein, i.e., a PN junction diode structure since it shows excellent Rs sensitivity to variation caused by energy difference at the well implant step.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.12
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• pp.53-58
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• 1998

A buried channel poly-Si TFT (BCTFT) for application of high performance integrated circuits has been proposed and fabricated. BCTFT has unique features, such as the moderately-doped buried channel and counter-doped body region for conductivity modulation, and the fourth terminal entitled back bias for preventing kink effect. The n-type and p-type BCTFT exhibits superior performance to conventional poly-Si TFT in ON-current and field effect mobility due to moderate doping at the buried channel. The OFF-state leakage current is not increased because the carrier drift is suppressed by the p-n junction depletion between the moderately-doped buried channel and the counter-doped body region.

• Journal of Sensor Science and Technology
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• v.4 no.1
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• pp.3-8
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• 1995

n-ITO/p-PSL heterojunction photodetector have been fabricated on the Si wafer by using ITO(indium tin oxide) and PSL(porous silicon layer). They were anodized selectively by using silicon nitride and Ni-Cr/Au and were passivated by using ITO as well as being isolated by using mesa structure. With white light from 0 to 3000 Lux, the photocurrent varied linearly with incident light intensity. The reverse characteristics of fabricated devices were very stable up to a bias voltage of -40V and dark current density was about $40nA/mm^{2}$. When the device was exposed by Xe lamp whose wavelength range from 400nm to 1100nm, the maximum photo responsivity was about 0.6A/W between 600 and 700nm. Variation of the characteristics of fabricated devices after 5 weeks was negligible.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.5
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• pp.555-560
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• 2014

In order to improve spectrum sensitivity of photodiode for detection of the laser wavelength at 850 nm ~ 1000 nm of near-infrared band, this study has produced silicon-based photodiode whose area is $5000{\mu}m{\times}2000{\mu}m$, and the thickness is $280{\mu}m$. It was packed by the TO-5 type. The electrical properties of the dark currents have valued of approximately 0.1 nA for 5 V reverse bias, while the capacitance showed 32.5 pF at frequency range of 1 kHz and about 32.4 pF at the range of 200 kHz for 0 V. In addition, the rising time of output signal was as fast response as 20.92 ns for 10V. For the optical properties, the best spectrum sensitivity was 0.57 A/W for 890 nm, while it was relatively excellent value of 0.37 A/W for 1,000 nm. Over all, there were good spectrum sensitivity for this diode over the range of 870 ~ 920 nm.

• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1277-1279
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• 1994

In the structure of ZnO/nip-SiC: H/metal substrate amorphous silicon (a-Si:H) solar cells, the effects of inserting a rear textured ZnO in the p-SiC:H/metal interface and a graded bandgap buffer layer in the i/p-SiC:H have been analysed by computer simulation. The incident light was taken to have an intensity of $100mW/cm^2$(AM-1). The thickness of the a-Si:H n, ${\delta}$-doped a-SiC:H p, and buffer layers was assumed to be $200{\AA},\;66{\AA}$, and $80{\AA}$, respectively. The scattering coefficients of the front and back ZnO were taken to be 0.2 and 0.7, respectively. Inserting the rear buffer layer significantly increases the open circuit voltage($V_{oc}$) due to reduction of the i/p interface recombination rate. The use of textured ZnO markedly improves collection efficiency in the long wavelengths( above ${\sim}550nm$ ) by back scattering and light confinement effects, resulting in dramatic enhancement of the short circuit current density($J_{sc}$). By using the rear buffer and textured ZnO, the i-layer thickness of the ceil for obtaining the maximum efficiency becomes thinner(${\sim}2500{\AA}$). From these results, it is concluded that the use of textured ZnO and buffer layer at the backside of the ceil is very effective for enhancing the conversion efficiency and reducing the degradation of a-Si:H pin-type solar cells.

• Advances in nano research
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• v.2 no.1
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• pp.23-56
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• 2014

The significant growth of the Si photovoltaic industry has been so far limited due to the high cost of the Si photovoltaic system. In this regard, the most expensive factors are the intrinsic cost of silicon material and the Si solar cell fabrication processes. Conventional Si solar cells have p-n junctions inside for an efficient extraction of light-generated charge carriers. However, the p-n junction is normally formed through very expensive processes requiring very high temperature (${\sim}1000^{\circ}C$). Therefore, several systems are currently under study to form heterojunctions at low temperatures. Among them, carbon nanotube (CNT)/Si hybrid solar cells are very promising, with power conversion efficiency up to 15%. In these cells, the p-type Si layer is replaced by a semitransparent CNT film deposited at room temperature on the n-doped Si wafer, thus giving rise to an overall reduction of the total Si thickness and to the fabrication of a device with cheaper methods at low temperatures. In particular, the CNT film coating the Si wafer acts as a conductive electrode for charge carrier collection and establishes a built-in voltage for separating photocarriers. Moreover, due to the CNT film optical semitransparency, most of the incoming light is absorbed in Si; thus the efficiency of the CNT/Si device is in principle comparable to that of a conventional Si one. In this paper an overview of several factors at the basis of this device operation and of the suggested improvements to its architecture is given. In addition, still open physical/technological issues are also addressed.