• Analytical Science and Technology
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• v.20 no.1
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• pp.10-16
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• 2007

This research was designed to investigate the formations of hazardous air pollutants in the MSWs pyrolysis-gasification-melting process. In this survey, PCDDs/PCDFs (polychlorinated dibenzo-p-dioxins and polychlorinated dibenzofuran) were investigated in the two facilities (A and B facilities). In A facility, the PCDDs/DFs concentrations were 0.88, 2.29, 0.16 ng I-TEQ/$m^3$ respectively on the secondary incinerator, boiler and stack. In B facility, the PCDDs/PCDFs concentrations were 0.22, 0.05 ng I-TEQ/$m^3$ respectively on the pyrolysis-gasification-melting furnace and stack. The concentrations of PCDDs/PCDFs increased due to resynthesis during cooling process in the both facilities. High concentrations of PCDDs/PCDFs isomers were founded as 2, 3, 4, 7, 8-PeCDF, 2, 3, 4, 6, 7, 8-HxCDF and 1, 2, 3, 6, 7, 8-HxCDF orderly in A facility, and 2, 3, 4, 7, 8-PeCDF, 1, 2, 3, 7, 8-PeCDD and 2, 3, 4, 6, 7, 8-HxCDF orderly in B facility.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.134-134
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• 2011

High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

• Journal of IKEEE
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• v.13 no.2
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• pp.194-199
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• 2009

In this study, ultra high-voltage (170kV AC), reliable 80pF mica capacitors for partial discharge system application were investigated. For capacitors design, Program was developed to sampling of series and parallel parameters. Mica was used as the dielectric of the capacitors. Using the conservative design rule, over 3 individual 50$\mu$m thick mica sheets with a size of 30mm$\times$35mm were used with lead foils to form a parallel capacitor element and 20 mica sheets were interleaved with lead foils to form a series stack of parallel capacitor element to meet the requirements of the capacitors. The dimension of the fabricated 80pF capacitor for 17kV AC were 90mm$\times$90mm. The high-frequency characteristics of the capacitance (C) and dissipation factor (D) of the developed capacitors were measured using a capacitance meter. The developed capacitor exhibited C of 79.5pF, had D of 0.001% over the frequency ranges of 150kHz to 50MHz, had a self-resonant frequency of 65MHz.

• 한국지구물리탐사학회:학술대회논문집
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• 2006.06a
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• pp.95-100
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• 2006

To reveal subsurface structures of the Ulsan fault, seismic data were recorded along a 750-m long line near Nongso-Eup in Ulsan. P and S waves were generated simultaneously by impacting a 5 kg sledgehammer on a tilted plate. The data were received by 16 10-Hz 3-component geophones at 3 m intervals. Refracted P waves were inverted using the tomography method. Dip moveout and migration were applied to reflection data processed following a general sequence. Four layers were identified based on P-wave velocities and P- and S-wave stacked image. From top to bottom, the P-wave velocity of each layer ranges in $300{\sim}1100\;m/s$, $1100{\sim}1700\;m/s$, $1700{\sim}2700\;m/s$, and greater than 2700 m/s. The corresponding thickness of the top three layers averages 3.9 m, 5.9 m, 4.4 m, respectively. The S-wave stack section is effective to define subsurface structures shallower than 10 m.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.4
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• pp.597-601
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• 2009

Green car such as a hybrid electrical vehicle and fuel cell vehicle is developed as a commercial target. UN/ECE/WP29 is developing GTR of HFCV and establishing the regulation and standard of electrical safety by ELSA. The regulation and standard about Electrical safety of vehicle are prescribed in ISO, UN/ECE, FMVSS, Japanese Attachment and so on, in case of insulation resistance is referred to keep more than 100/Vdc, 500/Vac. However, accurate method to measure insulation resistance agreeable to structure of vehicle does not exist now, it is actually that correctness of measurement drops according to the feature of battery and fuel cell stack. In this paper, the method to measure insulation resistance for protection against electrical shock by direct contact or indirect contact in Green Car will be indicated by making a comparison between the insulation measurement in standard of electrical safety and the experiment results for HEV and HFCV.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1577-1582
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• 2006

Tandem OLED structures formed by connecting two or more low-voltage electroluminescent units (stacks) are effective for achieving high efficiency at low current density as well as long operational lifetime. We have fabricated white emitting tandem structures with two or three low-voltage white-emitting stacks using transparent organic "PN"-type connectors. Three- stack white tandem structures with efficiency greater than 24 cd/A at D65 and operational stability of about 110,000 h. (extrapolated) at $1000\;cd/m^2$ have been demonstrated. With a stacked structure, the power consumption for displays using an RGBW format can be reduced by 25% compared to previously described formulations. We have also fabricated advanced white tandem structures where the color gamut (NTSC x,y ratio) has been improved to greater than 70% using standard color filters. The white OLEDs can also be used to increase the colorrendering index CRI (>80%), an important consideration for solid-state lighting.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.212-212
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• 2010

최근 차세대 반도체 메모리 소자로 대두된 magnetic random access memory(MRAM)에 대한 연구가 활발히 진행되고 있다. 특히 MRAM의 magnetic tunnel junction(MTJ) stack을 구성하는 자성 재료의 건식 식각에 대한 연구에서는 좋은 profile을 얻고, 재층착의 문제를 해결하기 위한 노력이 계속해서 진행되고 있다. 본 연구에서는 photoresist(PR)과 Ti 하드 마스크로 패턴 된 배리어(barrier) 층인 MgO 박막의 식각 특성을 유도결합 플라즈마를 이용한 고밀도 반응성 이온 식각(inductively coupled plasma reactive ion etching-ICPRIE)을 통해서 연구하였다. PR 및 Ti 마스크를 이용한 자성 박막들은 HBr/Ar, HBr/$O_2$/Ar 식각 가스의 농도를 변화시키면서 식각되었다. HBr/Ar 가스를 이용 식각함에 있어서 좋은 식각 조건을 얻기 위한 parameter로서 pressure, bias voltage, rf power를 변화시켰다. 각 조건에서 Ti 하드마스크에 대한 터널 배리어층인 MgO 박막에 selectivity를 조사하였고 식각 profile을 관찰하였다. 식각 속도를 구하기 위해 alpha step(Tencor P-1)이 사용되었고 또한 field emission scanning electron microscopy(FESEM)를 이용하여 식각 profile을 관찰함으로써 최적의 식각 가스와 식각 조건을 찾고자 하였다.

• Journal of Electrochemical Science and Technology
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• v.12 no.3
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• pp.302-307
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• 2021

Polymer electrolyte membrane (PEM) electrolyzer or alkaline electrolyzer is required to produce green hydrogen using renewable energy such as wind and/or solar power. PEM and alkaline electrolyzer differ in many ways, instantly basic materials, system configuration, and operation characteristics are different. Building an optimal water hydrolysis system by closely grasping the characteristics of each type of electrolyzer is of great help in building a safe hydrogen ecosystem as well as the efficiency of green hydrogen production. In this study, the basic operation characteristics of a kW class alkaline water electrolyzer we developed, and water electrolysis efficiency are described. Finally, a brief overview of the characteristics of PEM and alkaline electrolyzer for large-capacity green hydrogen production system will be outlined.

• Journal of Animal Science and Technology
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• v.45 no.4
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• pp.593-606
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• 2003

This study was conducted to develop effective manufacturing methods of a total mixed ration(TMR) composed of broiler litter(BL) and bakery by-product(BB) for ruminants. Five experiments included a small-scaled manufacture of TMR using a deepstacking method(Exp. 1), its pelletization(Exp. 2), its field-scaled manufacture(Exp. 3), a field-scaled manufacture using an ensiling method(Exp. 4), and a mixing process of deepstacked BL and BB prior to feeding(Exp. 5). BL and BB were mixed at a ratio which makes total digestible nutrients of the TMR 69%. For each experiment, temperature, appearance and physico-chemical properties were recorded and analyzed. The chemical composition data revealed that the mixture of BL and BB showed nutritionally additive balance which resulted from a considerable increase(P<0.05) of organic matter and a desirable decrease(P<0.05) of protein and fiber up to the requirement level for growing ‘Hanwoo’ steers. Deepstacking of BL and BB in Exp. 1 and 3 resulted in a sufficient increase of stack temperature for pasteurization, little chemical losses, appearance of white fungi on the surface, and partial charring due to excess stack temperature. For Exp. 2, its pelleting, which was successful using a simple, small-scaled pelletizer, resulted in a little loss(P<0.05) of organic matter and an increase(P<0.05) of indigestible protein(ADF-CP). Ensiling the mixture in Exp. 4 made little effect on chemical composition; however, one month of the ensiling period was not enough for favorable silage parameters. Deepstacking BL alone in Exp. 5 tended(P<0.1) to decrease true protein : NPN ratio and hemicellulose content and increase ADF-CP content due to the heat damage occurred. Deepstacking or ensiling of BL-BB mixtures and simple incorporating of BB into deepstacked BL prior to feeding could be practical and nutrients-preservative methods in TMR manufacture for beef cattle, although ensiling needed further hygienic evaluation.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.318.1-318.1
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• 2016

Hafnium Oxide (HfOx) has been attracted as a promising gate dielectric for replacing SiO2 in gate stack applications. In this paper, Metal-Oxide-Semiconductor (MOS) capacitor with solution processed HfO2 high-k material as a dielectric were fabricated. The solvent using $HfOCl2{\cdot}8H2O$ dissolve in 2-Methoxy ethanol was prepared at 0.3M. The HfOx layers were deposited on p-type silicon substrate by spin-coating at $250^{\circ}C$ for 5 minutes on a hot plate and repeated the same cycle for 5 times, followed by annealing process at 350, 450 and $550^{\circ}C$ for 2 hours. When the annealing temperature was increased from 350 to $550^{\circ}C$, capacitance value was increased from 337 to 367 pF. That was resulted from the higher temperature of HfOx which have more crystallization phase, therefore dielectric constant (k) was increased from 11 to 12. It leads to the formation of dense HfOx film and improve the ability of the insulator layer. We confirm that HfOx layer have a good performance for dielectric layer in MOS capacitors.