• Title/Summary/Keyword: p a-SiC:H

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Design of DVB-T/H SiP using IC-embedded PCB Process (IC-임베디드 PCB 공정을 사용한 DVB-T/H SiP 설계)

  • Lee, Tae-Heon;Lee, Jang-Hoon;Yoon, Young-Min;Choi, Seog-Moon;Kim, Chang-Gyun;Song, In-Chae;Kim, Boo-Gyoun;Wee, Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.9
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    • pp.14-23
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    • 2010
  • This paper reports the fabrication of a DVB-T/H System in Package (SiP) that is able to receive and process the DVB-T/H signal. The DVB-T/H is the European telecommunication standard for Digital Video Broadcasting (DVB). An IC-embedded Printed Circuit Board (PCB) process, interpose a chip between PCB layers, has applied to the DVB-T/H SiP. The chip inserted in DVB-T/H SiP is the System on Chip (SoC) for mobile TV. It is comprised of a RF block for DVB-T/H RF signal and a digital block to convert received signal to digital signal for an application processor. To operate the DVB-T/H IC, a 3MHz DC-DC converter and LDO are on the DVB-T/H SiP. And a 38.4MHz crystal is used as a clock source. The fabricated DVB-T/H SiP form 4 layers which size is $8mm{\times}8mm$. The DVB-T/H IC is located between 2nd and 3rd layer. According to the result of simulation, the RF signal sensitivity is improved since the layout modification of the ground plane and via. And we confirmed the adjustment of LC value on power transmission is necessary to turn down the noise level in a SiP. Although the size of a DVB-T/H SiP is decreased over 70% than reference module, the power consumption and efficiency is on a par with reference module. The average power consumption is 297mW and the efficiency is 87%. But, the RF signal sensitivity is declined by average 3.8dB. This is caused by the decrease of the RF signal sensitivity which is 2.8dB, because of the noise from the DC-DC converter.

Leakage Current and Threshold Voltage Characteristics of a-Si:H TFT Depending on Process Conditions (a-Si:H TFT의 누설전류 및 문턱전압 특성 연구)

  • Yang, Kee-Jeong;Yoon, Do-Young
    • Korean Chemical Engineering Research
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    • v.48 no.6
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    • pp.737-740
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    • 2010
  • High leakage current and threshold voltage shift(${\Delta}Vth$) are demerits of a-Si:H TFT. These characteristics are influenced by gate insulator and active layer film quality, surface roughness, and process conditions. The purpose of this investigation is to improve off current($I_{off}$) and ${\Delta}V_{th}$ characteristics. Nitrogen-rich deposition condition was applied to gate insulator, and hydrogen-rich deposition condition was applied to active layer to reduce electron trap site and improve film density. $I_{off}$ improved from 1.01 pA to 0.18 pA at $65^{\circ}C$, and ${\Delta}V_{th}$ improved from -1.89 V to 1.22 V.

The characteristics of Efficiency through HIT layer thickness (HIT 층 두께 변화를 통한 태양전지 효율 특성)

  • Kim, Moo-Jung;Pyeon, Jin-Ho;Yi, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.232-232
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    • 2010
  • Simulation Program (AFORS-HET 2.4.1) was used, include the basic structure of crystalline silicon thin film as above, under the intrinsic a-Si:H films bonded symmetrical structure (Symmetrical structure) were used. The structure of ITO, a-Si p-type, intrinsic a-Si, c-Si, intrinsic a-Si, a-Si n-type, metal (Al) layer has one of the seven. When thickness for each layer was given the change, the changes of a-Si p-type layer and the intrinsic a-Si layer on top had an impact on efficiency. Efficiency ratio of p-type a-Si:H layer thickness was sensitive to, especially a-Si: H layer thickness is increased in a rapid decrease in Jsc and FF, and efficiency was also decreased.

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Low Resistance 3.3kV 4H-SiC Trench Shielded DMOSFET (Trench Shield 구조를 갖는 3.3kV급 저저항 4H-SiC DMOSFET)

  • Cha, Kyu-hyun;Kim, Kwang-su
    • Journal of IKEEE
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    • v.24 no.2
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    • pp.619-625
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    • 2020
  • In this paper, we propose a TS-DMOSFET(Trench Shielded DMOSFET) structure in which P+ shielding region is formed in a deeper region than C-DMOSFET(Conventional DMOSFET) and S-DMOSFET(Shielded DMOSFET). Using TCAD simulation to compare the static characteristics of TS-DMOSFET with C- and S-DMOSFET. As for the structure proposed, the doping is followed by the source trench process. Despite the fact that it is a SiC material, this allows it to form a P+ shielding region in a deep area. Followed by completely suppressing the reach-through effect. As a result, when the breakdown voltage of the three structures is 3.3kV, the Ron of TS-DMOSFET is 9.7mΩ㎠. Thus, it is 68% and 54% smaller than the Ron of C-DMOSFET and S-DMOSFET respectively.

이종접합 태양전지용 p a-Si:H 에미터 층 최적화 및 태양전지 특성 거동 연구

  • Kim, Kyung Min;Jeong, Dae Young;Song, Jun Yong;Park, Joo Hyung;Oh, Byung Sung;Song, Jinsoo;Lee, Jeong Chul
    • 한국신재생에너지학회:학술대회논문집
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    • 2011.05a
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    • pp.129.2-129.2
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    • 2011
  • 본 연구에서는 a-Si:H/c-si 구조의 이종접합 태양전지의 p a-Si:H 에미터 층의 박막 조건에 따라 태양전지 특성을 연구하였다. p, n-layer는 PECVD (Plasma-enhanced chemical vapor deposition) i-layer는 HWCVD(Hot wire chemical vapor deposition), ITO는 RF 마그네트론 스퍼터링법으로 제작하였다. p-layer의 도핑 농도, 기판 증착 온도, 증착 높낮이에 따라 특성을 비교 분석 하였다. QSSPC로 minority carrier life time, 자외 가시선 분광분석 장치로 투과 반사도를, Ellipsometer로 흡수 계수, 두께, FTIR로 막의 구성요소 등의 변화를 조사하여 개선된 p a-Si:H의 특성이 이종접합 태양전지에서 효율향상에 영향을 주는지 Photo IV와 EQE를 통하여 조사하였다.

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Low resistivity ohmic Pt/Ti contacts to p-type 4H-SiC (오옴성 접합에서의 낮은 접촉 저항을 갖는 Pt/Ti/P형 4H-SiC)

  • Lee, J.H.;Yang, S.J.;Kim, C.K.;Cho, N.I.;Jung, K.H.;Shin, M.S.
    • Proceedings of the KIEE Conference
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    • 2001.07c
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    • pp.1378-1380
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    • 2001
  • Ohmic contacts have been fabricated on p-type 4H-SiC using Pt/Ti. Low resistivitf Ohmic contacts of Pt/Ti to p-type 4H-SiC were investigated. Specific contact resistances were measured using the transmission line model method, and the physical properties of the contacts were examined using x-ray diffraction, scanning electron microscopy. Ohmic behavior with linear current-voltage characteristics was observed following anneals at $900^{\circ}C$ for 90sec at a pressure of $3.4{\times}10^{-5}$ Torr. The Pt/Si/Ti films was measured lower value of the specific contact resistance by the annealing process, and the contact resistances were improved more than one order compared to Ti contact the annealed sample. Scanning electron microscopy shows that the Pt layer effectively reduce the oxidation of Ti films. And results are obtained as $4.6{\times}10^{-4}$ ohm/$cm^2$ for a Pt/Ti metal structure after a vacuum annealing at $900^{\circ}C$ for 90sec. Titanium has a relatively high melting point, thus Ti-based metal contacts were attempted in this study.

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Electrical Characterization of MOS (metal-oxide-semiconductor) Capacitors on Plasma Etch-damaged 4H-Silicon Carbide (플라즈마 에칭으로 손상된 4H-실리콘 카바이드 기판위에 제작된 MOS 커패시터의 전기적 특성)

  • 조남규;구상모;우용득;이상권
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.4
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    • pp.373-377
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    • 2004
  • We have investigated the electrical characterization of metal-oxide-semiconductor (MOS) capacitors formed on the inductively coupled plasma (ICP) etch-damaged both n- and p-type 4H-SiC. We found that there was an effect of a sacrificial oxidation treatment on the etch-damaged surfaces. Current-voltage and capacitance-voltage measurements of these MOS capacitors were used and referenced to those of prepared control samples without etch damage. It has been found that a sacrificial oxidation treatment can improve the electrical characteristics of MOS capacitors on etch-damaged 4H-SiC since the effective interface density and fixed oxide charges of etch-damaged samples have been found to increase while the breakdown field strength of the oxide decreased and the barrier height at the SiC-SiO$_2$ interface decreased for MOS capacitors on etch-damaged surfaces.

Optimization of I layer bandgap for efficient triple junction solarcell by ASA simulation (삼중접합 태양전지에서 Intrinsic Layer 밴드갭 가변을 통한 태양전지 고효율화 시뮬레이션)

  • Kang, Minho;Jang, Juyeon;Baek, Seungsin;Yi, Junsin
    • 한국신재생에너지학회:학술대회논문집
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    • 2011.11a
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    • pp.64.1-64.1
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    • 2011
  • 다중접합 태양전지는 흡수대역이 다른 juntion으로 구성되어, 각각의 태양전지 간의 전류정합(current matching)이 효율 향상에 중요하다. 본 실험에서는 Top cell에 i-a-Si:H(Thinckness:100nm), Middle cell에는 i-a-SiGe:H(Thickness:800nm)을 적용하였고, bottom cell에는 i-${\mu}c$-Si:H(Thickness:1800nm), 수광부의 p-layer에 에 SiOx을 이용하여 triple juntion amorphous silicon solar cell(삼중접합태양전지)을 구현하였다. 이를 최적화 시키기 위해 ASA simulation을 이용하여 각 Cell의 intrinsic layer의 밴드갭을 가변하였다. 가변 결과 i-a-Si:H : 1.85 eV, i-a-SiGe:H: 1.6 eV, i-${\mu}c$-Si:H: 1.4 eV에서 태양전지 효율 14.5 %을 기록 하였다. 본 연구를 통해 Triple juntion cell에서의 intrinsic layer의 밴드갭 최적화를 구현해 볼 수 있었다.

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A comparative investigation of pH-sensing properties of LPCVD $Si_3N_4$ sensors configured in three different structures (세 가지 다른 구조로 제작된 LPCVD $Si_3N_4$ 센서 소자의 pH 감지특성의 비교분석)

  • Shin, Paik-Kyun;Lee, Neung-Heon;Im, Heon-Chan;Kim, Jin-Sik;Park, Kang-Sik;Cho, Ki-Seon;Lee, Duck-Chool
    • Proceedings of the KIEE Conference
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    • 2004.07c
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    • pp.1694-1696
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    • 2004
  • $Si_3N_4$ 박막을 동일한 공정 파라메터로 저압 화학기상증착법(LPCVD)으로 증착하고, IS, LOCOS- IS 및 ISFET의 세 가지 각각 다른 구조로 하여 용약 중 pH 농도 감지용 센서소자를 제작하였다. 이 세 가지 다른 센서소자에 대하여 pH 농도변화에 따른 감지도, 감지특성곡선의 선형성, 히스테리시스 등 주요 특성을 각각 조사한 후 비교 분석하였다. LOCOS-IS 구조의 pH 센서는 ISFET 구조의 pH 센서와 유사한 우수한 제반 pH 감지특성을 보였으나, 간단한 IS 구조의 pH 센서는 이들에 비해 상대적으로 열악한 pH 감지특성을 보였다. 동일공정으로 제작된 Si3N4 박막으로 제작되었음에도 불구하고 간단한 IS 구조의 pH 센서의 비교적 열악한 특성을 보이는 원인을 규명하기 위하여, pH 농도 변화에 따른 C-V특성 변화에 의한 pH 감지특성 조사시의 IS 및 LOCOS-IS 구조의 정전용량의 변화를 비교하고 고찰하였다.

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SiC(3C)/Si Photodetector (SiC(3C)/Si 수광소자)

  • 박국상;남기석;김정윤
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.9 no.2
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    • pp.212-216
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    • 1999
  • SiC(3C) photodiodes (PDs) were fabricated on p-type Si(111) substrates using chemical vapor deposition (CVD) technique by pyrolyzing tetramethylsilane (TMS) with $H_{2}$ carrier gas. Electrical properties of SiC(3C) were investigated by Hall measurement and current-voltage (I-V) characteristics. SiC(3C) layers exhibited n-type conductivity. Ohmic contact was formed by thermal evaporation Al metal through a shadow-mask. The optical gain $(G_{op})$ of the SiC(3C)/Si PD was measured as a function of the incident wavelength. For the analysis of the photovoltaic detection of the Sic(3C) n/p PD, the spectral response (SR) has calculated by using the electrical parameters of the SiC(3C) layer and the geometric structure of the PD. The peak response calculated for properly chosen parameters was about 0.75 near 550 nm. We expect a good photoresponse in the SiC(3C) heterostructure for the wavelength range of 400~600 nm. The SiC(3C) photodiode can detect blue and near ultraviolet (UV) radiation.

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