• 한국세라믹학회지
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• 제37권2호
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• pp.186-193
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• 2000

Effects of 1.0 mol% CoO addition on sintering and the electrical properties of ZnO-Bi2O3-Sb2O3(ZBS) varistor system with 3.0 mol% co-addition of Sb2O3 and Bi2O3 at various Sb/Bi ratio (0.5, 1.0, and 2.0) were investigated. Cobalt had little influence on the liquid-phase formation and the pyrochlore decomposition temepratures of ZBS, while densification was mainly dependent on Sb/Bi ratio: when Sb/Bi=0.5, excess Bi2O3 irrelevant to the formation of pyrochore(Zn2Sb3Bi3O14) forms eutectic liquid at ~75$0^{\circ}C$ which promotes densification and grain growth; with Sb/Bi=2.0, the second phase Zn7Sb2O12 formed by excess Sb2O3 irrelevant to the formation of the pyrochlore retards densification up to ~100$0^{\circ}C$. These phases caused the coarsening and uneven distribution of the second phase particles on the grain boundaries of ZnO above the pyrochlore decomposition temperature(~105$0^{\circ}C$), which led to broad size dist-ribution of ZnO; the specimen with Sb/Bi=1.0 showed homogeneous microstructure compared with the others, which enabled improved varistor characteristics. Doping of Co increased the nonlinearity and the potential barrier height of ZBS, which is thought to stem from improved sintering behavior such as homogenized microstructure due to size reduction and even distribution of the second phase and suppressed volatility of Bi2O3, as well as the improvement in the potential barrier structure via increased donor and interface electron trap densities.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 추계학술대회 논문집
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• pp.34-37
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• 1992

In this paper, the $(SrPb)(CaMg)TiO_3$-xBi_2O_3{\cdot}3TiO_2$ ceramics with paraelectric properties were fabricated by the mixed oxide method. In order to investigate the behavior of charged particles, the characteristics of electrical conduction and thermally stimulated current were measured respectively. As a result on characteristics of the electrical conduction, the leakage current was increased as measuring temperature was increased. At room temperature, the conduction current was divided into the three steps as a function of DC electric field. The first step was Ohmic region due to ionic conduction, below 15[kV/cm]. The second step was showed a saturation which seems to be related to a depolarizing field occuring in field-enforced ferroelectric phase, between 15[kV/cm] and 40[kV/cm]. The third step was attributed to Child's law related to spare charge which injected from electrode, above 40[kV/cm]. Thermally stimulated currents(TSC) spectra with various biasing fields exhibited three distinguished peaks that were denoted as ${\alpha}$, ${\alpha}'$ and ${\beta}$ peak, each of which appeared at nearby -30, 20 and 95[$^{\circ}C$] respectively. It is confirmed that the a peak was due to trap electron trapped in the grainboundary, and ${\alpha}'$ peak that was observed above only 1.5[kV/mm] was attributed to field-enforced ferroelectric polarization. The origin of ${\beta}$ peak was identified as ion migration which caused the degradation.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.95-95
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• 2014

An OLED(Organic Light-Emitting Diode) device based on the emissive electroluminescent layer a film of organic materials. OLED is used for many electronic devices such as TV, mobile phones, handheld games consoles. ULVAC's mass production systems are indispensable to the manufacturing of OLED device. ULVAC is a manufacturer and worldwide supplier of equipment and vacuum systems for the OLED, LCD, Semiconductor, Electronics, Optical device and related high technology industries. The SMD Series are single-substrate sputtering systems for deposition of films such as metal films and TCO (Transparent Conductive Oxide) films. ULVAC has delivered a large number of these systems not only Organic Evaporating systems but also LTPS CVD systems. The most important technology of thin-film encapsulation (TFE) is preventing moisture($H_2O$) and oxygen permeation into flexible OLED devices. As a polymer substrate does not offer the same barrier performance as glass substrate, the TFE should be developed on both the bottom and top side of the device layers for sufficient lifetimes. This report provides a review of promising thin-film barrier technologies as well as the WVTR(Water Vapor Transmission Rate) properties. Multilayer thin-film deposition technology of organic and inorganic layer is very effective method for increasing barrier performance of OLED device. Gases and water in the organic evaporating system is having a strong influence as impurities to OLED device. CRYO pump is one of the very useful vacuum components to reduce above impurities. There for CRYO pump is faster than conventional TMP exhaust velocity of gases and water. So, we suggest new method to make a good vacuum condition which is CRYO Trap addition on OLED evaporator. Alignment accuracy is one of the key technologies to perform high resolution OLED device. In order to reduce vibration characteristic of CRYO pump, ULVAC has developed low vibration CRYO pumps to achieve high resolution alignment performance between Metal mask and substrate. This report also includes ULVAC's approach for these issues.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.466-468
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• 2012

Amorphous InGaZnO (${\alpha}$-IGZO) thin-film transistors (TFTs) are are very promising due to their potential use in thin film electronics and display drivers [1]. However, the stability of AOS-TFTs under the various stresses has been issued for the practical AOSs applications [2]. Up to now, many researchers have studied to understand the sub-gap density of states (DOS) as the root cause of instability [3]. Nomura et al. reported that these deep defects are located in the surface layer of the ${\alpha}$-IGZO channel [4]. Also, Kim et al. reported that the interfacial traps can be affected by different RF-power during RF magnetron sputtering process [5]. It is well known that these trap states can influence on the performances and stabilities of ${\alpha}$-IGZO TFTs. Nevertheless, it has not been reported how these defect states are created during conventional RF magnetron sputtering. In general, during conventional RF magnetron sputtering process, negative oxygen ions (NOI) can be generated by electron attachment in oxygen atom near target surface and accelerated up to few hundreds eV by self-bias of RF magnetron sputter; the high energy bombardment of NOIs generates bulk defects in oxide thin films [6-10] and can change the defect states of ${\alpha}$-IGZO thin film. In this paper, we have confirmed that the NOIs accelerated by the self-bias were one of the dominant causes of instability in ${\alpha}$-IGZO TFTs when the channel layer was deposited by conventional RF magnetron sputtering system. Finally, we will introduce our novel technology named as Magnetic Field Shielded Sputtering (MFSS) process [9-10] to eliminate the NOI bombardment effects and present how much to be improved the instability of ${\alpha}$-IGZO TFTs by this new deposition method.

• 대한화학회지
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• 제24권3호
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• pp.218-224
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• 1980

산화아연에 흡착한 산소종과 CO, $C_2H_4$의 표면반응을 EPR 분광법을 사용하여 연구했다. (1) $25^{\circ}$, $100^{\circ}$, $200^{\circ}$, $300^{\circ}C$등 여러온도에서 산소가 흡착된 산화아연의 EPR 스펙트럼을 비교하여 g = 2.014의 피이크가 산소결합에 trap된 $O^-$에서 나옴을 알았다. (2) 각 온도에서 산소가 흡착된 산화아연을 CO, $C_2H_4$와 접촉시켜 흡착종의 반응성을 알아보았으며, 안정한 $O_2^-$의 EPR스펙트럼을 이용하여 탈착된 표면을 검출했다. (3) 비교적 높은 온도에서 존재하는 $O^-$는 $25^{\circ}C$에서도 CO, $C_2H_4$와 반응하여 완전산화반응을 하며 생성된 흡착종들은 $200^{\circ}C$에서 탈착되었다. (4) $180^{\circ}C$까지 주로 존재하는 $O_2^-$는 CO의 반응하지 않았고 $C_2H_4$와 반응하여 $200^{\circ}C$에서 탈착되는 g=2.002의 등방성 EPR 스펙트럼을 갖는 생성물을 만들었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권1호
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• pp.40-47
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• 2014

In this paper, $Al_2O_3$ film deposited by thermal atomic layer deposition (ALD) with diluted $NH_4OH$ instead of $H_2O$ was suggested for passivation layer and anti-reflection (AR) coating of the p-type crystalline Si (c-Si) solar cell application. It was confirmed that the deposition rate and refractive index of $Al_2O_3$ film was proportional to the $NH_4OH$ concentration. $Al_2O_3$ film deposited with 5 % $NH_4OH$ has the greatest negative fixed oxide charge density ($Q_f$), which can be explained by aluminum vacancies ($V_{Al}$) or oxygen interstitials ($O_i$) under O-rich condition. $Al_2O_3$ film deposited with $NH_4OH$ 5 % condition also shows lower interface trap density ($D_{it}$) distribution than those of other conditions. At $NH_4OH$ 5 % condition, moreover, $Al_2O_3$ film shows the highest excess carrier lifetime (${\tau}_{PCD}$) and the lowest surface recombination velocity ($S_{eff}$), which are linked with its passivation properties. The proposed $Al_2O_3$ film deposited with diluted $NH_4OH$ is very promising for passivation layer and AR coating of the p-type c-Si solar cell.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.20-20
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• 2007

Nanowire-based field-effect transistors (FETs) decorated with nanoparticles have been greatly paid attention as nonvolatile memory devices of next generation due to their excellent transportation ability of charge carriers in the channel and outstanding capability of charge trapping in the floating gate. In this work, top-gate single ZnO nanowire-based FETs with and without Au nanoparticles were fabricated and their memory effects were characterized. Using thermal evaporation and rapid thermal annealing processes, Au nanoparticles were formed on an $Al_2O_3$ layer which was semi cylindrically coated on a single ZnO nanowire. The family of $I_{DS}-V_{GS}$ curves for the double sweep of the gate voltage at $V_{DS}$ = 1 V was obtained. The device decorated with nanoparticles shows giant hysterisis loops with ${\Delta}V_{th}$ = 2 V, indicating a significant charge storage effect. Note that the hysterisis loops are clockwise which result from the tunneling of the charge carriers from the nanowire into the nanoparticles. On the other hand, the device without nanoparticles shows a negligible countclockwise hysterisis loop which reveals that the influence of oxide trap charges or mobile ions is negligible. Therefore, the charge storage effect mainly comes from the nanoparticles decorated on the nanowire, which obviously demonstrates that the top-gate single ZnO nanowire-based FETs decorated with Au nanoparticles are the good candidate for the application in the nonvolatile memory devices of next generation.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.148-148
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• 2010

플래시 메모리로 대표되는 비휘발성 메모리는 IT 기술의 발달에 힘입어 급격한 성장세를 나타내고 있지만, 메모리 소자의 크기가 작아짐에 따라서 그 물리적 한계에 이르러 차세대 메모리에 대한 요구가 점차 높아지고 있는 실정이다. 따라서, 이러한 문제점에 대한 대안으로서 고속 동작 및 정보의 저장 시간을 향상 시킬 수 있는 nano-floating gate memory (NFGM)가 제안되었다. Nano-floating gate에서 사용되는 nanocrystal (NCs) 중에서 Si nanocrystal은 비휘발성 메모리뿐만 아니라 발광 소자 및 태양 전지 등의 매우 다양한 분야에 광범위하게 응용되고 있지만, NCs의 크기와 밀도를 제어하는 것이 가장 중요한 문제로 이를 해결하기 위해서 많은 연구가 진행되고 있다. 또한, 소자의 소형화가 이루어지면서 기존의 플래시 메모리 한계를 극복하기 위해서 터널베리어에 관한 관심이 크게 증가했다. 특히, 최근에 많은 주목을 받고 있는 개량형 터널베리어는 크게 VARIOT (VARIable Oxide Thickness) barrier와 CRESTED barrier의 두 가지 종류가 제안되어 있다. VARIOT의 경우에는 매우 얇은 두께의low-k/high-k/low-k 의 적층구조를 가지며, CRESTED barrier의 경우에는 반대의 적층구조를 가진다. 이와 같은 개량형 터널 베리어는 전계에 대한 터널링 전류의 감도를 증가시켜서 쓰기/지우기 특성을 향상시키며, 물리적인 절연막 두께의 증가로 인해 데이터 보존 시간의 향상을 달성할 수 있다. 본 연구에서는 박막의 $SiO_2$와 $Si_3N_4$를 적층한 VARIOT 타입의 개량형 터널 절연막 위에 전하 축적층으로 $SiN_x$층의 내부에 Si-NCs를 갖는 비휘발성 메모리 소자를 제작하였다. Si-NCs를 갖지 않는 $SiN_x$전하 축적층은 Si-NCs를 갖는 전하 축적층보다 더 작은 메모리 윈도우와 열화된 데이터 보존 특성을 나타내었다. 또한, Si-NCs의 크기가 감소됨에 따라 양자 구속 효과가 증가되어 느린 지우기 속도를 보였으나, 데이터 보존 특성이 크게 향상됨을 알 수 있었다. 그러므로, NFGM의 빠른 쓰기/지우기 속도와 데이터 보존 특성을 동시에 만족하기 위해서는 Si-NCs의 크기 조절이 매우 중요하며, NCs크기의 최적화를 통하여 고집적/고성능의 차세대 비휘발성 메모리에 적용될 수 있을 것이라 판단된다.

• 한국진공학회지
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• 제10권1호
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• pp.44-50
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• 2001

전자빔증착법과 이온빔의 도움을 받는 전자빔 증착법(ion beam assisted electron beam deposition; IBAED)법으로 비정질 Si(-200nm) 박막을 p-Si 기판위에 성장하고 이 두 구조를 급속열처리산화(Rapid Thermal Oxidation; RTO)를 시킴으로서 $SiO_2$/나노결정 Si(nanocrystal Si)/p-Si구조를 형성하였다. 그 후 시료 위에 Au 막을 증착함으로서 최종적으로 나노결정이 함유된 MOS(metal-oxide-semiconductor)구조를 완성하였다. 이 MOS구조내의 나노결정 Si의 전하충전 특성을 바이어스 sweep 비율을 변화시키면서 Capacitance-Voltage(C-V) 특성을 측정하여 조사하였다. 전자빔증착시료의 경우에는 $\DeltaV_{FB}$(flatband voltage shift)가 1V 미만의 작은 C-V 이력곡선이 관측된 반면 IBAED 시료의 경우는 $\DeltaV_{FB}$가 22V(2V/s Voltage Sweep비율) 이상인 대단히 큰 C-V 이력곡선이 관측되었다. 전자빔증착중 Ar ion beam을 조사하면 표면 흡착원자이동이 활성화되고 따라서 비정질 Si내에 Si의 핵 생성율이 증가하여 후속 급속열처리산화공정중 이 높은 농도의 핵들이 나노결정 Si으로 자라나게 되고 이렇게 형성된 높은 농도의 나노결정의 전하 충전 및 방전현상이 큰 이력곡선을 나타내는 원인이라고 생각된다. 따라서 IBAED 방법이 고농도의 나노결정 Si을 형성시키는데 유용한 방법이라고 판단된다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.254-255
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• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.