• 제목/요약/키워드: organic thin-film-transistor

검색결과 285건 처리시간 0.033초

Threshold Voltage Control of Pentacene Thin-Film Transistor with Dual-Gate Structure

  • Koo, Jae-Bon;Ku, Chan-Hoe;Lim, Sang-Chul;Lee, Jung-Hun;Kim, Seong-Hyun;Lim, Jung-Wook;Yun, Sun-Jin;Yang, Yong-Suk;Suh, Kyung-Soo
    • Journal of Information Display
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    • 제7권3호
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    • pp.27-30
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    • 2006
  • This paper presents a comprehensive study on threshold voltage $(V_{th})$ control of organic thin-film transistors (OTFTs) with dual-gate structure. The fabrication of dual-gate pentacene OTFTs using plasma-enhanced atomic layer deposited (PEALD) 150 nm thick $Al_{2}O_{3}$ as a bottom gate dielectric and 300 nm thick parylene or PEALD 200 nm thick $Al_{2}O_{3}$ as both a top gate dielectric and a passivation layer was investigated. The $V_{th}$ of OTFT with 300 nm thick parylene as a top gate dielectric was changed from 4.7 V to 1.3 V and that with PEALD 200 nm thick $Al_{2}O_{3}$ as a top gate dielectric was changed from 1.95 V to -9.8 V when the voltage bias of top gate electrode was changed from -10 V to 10 V. The change of $V_{th}$ of OTFT with dual-gate structure was successfully investigated by an analysis of electrostatic potential.

수소 플라즈마 처리를 이용한 역스테거드형 펜타센 트랜지스터의 전기적 특성 향상에 대한 연구 (Study on the Electrical Characterization of Inverted Staggered Pentacene Thin Film Transistor using Hydrogen Plasma Treatment)

  • 장재원;이주원;김재경;김영철;주병권
    • 한국전기전자재료학회논문지
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    • 제16권11호
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    • pp.961-968
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    • 2003
  • In order to reach the high electrical quality of organic thin film transistors (OTFTs) such as high mobility and on-off current ratio, it is strongly desirable to study the enhancement of electrical properties in OTFTs. Here, we report the novel method of hydrogen plasma treatment to improve electrical properties in inverted staggered OTFTs based on pentacene as active layer. To certify the effect of this method, we compared the electrical properties of normal device as a reference with those of device using the novel method. In result, the normal device as a reference making no use of this method exhibited a field effect mobility of 0.055 $\textrm{cm}^2$/Vs, on/off current ratio of 10$^3$, threshold voltage of -4.5 V, and subthreshold slope of 7.6 V/dec. While the device using the novel method exhibited a field effect mobility of 0.174 $\textrm{cm}^2$/Vs, on/off current ratio of 10$\^$6/, threshold voltage of -0.5 V, and subthreshold slope of 1.49 V/dec. According to these results, we have found the electrical performances in inverted staggered pentacene TFT owing to this method are remarkably enhanced. So, this method plays a key role in highly improving the electric performance of OTFTs. Moreover, this method is the first time yet reported for any OTFTs.

증착 속도에 따른 펜타센 박막 트랜지스터의 성능 연구 (Performance of Pentacene-based Thin-film Transistors Fabricated at Different Deposition Rates)

  • 황진호;김두리;김민우;이한주;;;;이기진;차덕준
    • 새물리
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    • 제68권11호
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    • pp.1192-1195
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    • 2018
  • 본 연구는 각각 다른 증착 속도로 제작된 유기 박막 트랜지스터(organic thin film transistor, OTFT)의 전하 이동도와 문턱 전압을 측정하여 전기적 성질을 분석했다. OTFT의 활성층으로, 펜타센 (pentacene)을 $0.05{\AA}/s{\sim}1.14{\AA}/s$의 증착 속도에 따라 50 nm의 두께로 진공 열 증착했다. 드레인-소스 전극은 금 (Au)을 50 nm의 두께로 증착했다. 펜타센 증착 속도가 $0.05{\AA}/s$일 때 전하 이동도는 $1.9{\times}10^{-1}cm^2/V{\cdot}s$였고, 증착 속도가 $0.4{\AA}/s$로 증가함에 따라 전하 이동도는 $5.2{\times}10^{-1}cm^2/V{\cdot}s$로 증가했으며, 증착 속도가 $1.14{\AA}/s$로 증가함에 따라 전하 이동도는 $6.5{\times}10^{-1}cm^2/V{\cdot}s$로 감소했다. 따라서, 펜타센기반의 OTFT의 전하 이동도는 열 증착 속도에 의존함을 관측하였다.

4.1' Flexible Organic Light Emitting Diodes Driven by Organic Thin-Film Transistors

  • Hu, Tarng-Shiang;Wang, Yi-Kai;Lin, Tsung-Hsien;Yan, Jing-Yi;Lee, Tzu-Wei;Yu, Chien-Hsien;Wen, Jiing-Fa;Kao, Chi-Jen;Chen, Liang-Hsiang;Shen, Yu-Yuan;Yeh, Shu-Tang;Tseng, Mei-Rurng;Wu, Po-Sheng;Ho, Jia-Chong;Lee, Cheng-Chung
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.314-316
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    • 2006
  • In this paper, the plastic organic thin-film transistors (OTFTs) with $32{\ast}32$ array are presented. Flexible organic light emitting diodes (OLEDs) operated by OTFTs are fabricated with a novel lamination method and the results are also presented. OTFT pixels defined by photolithography, and pentacene deposited by thermal evaporation. Fabrication method and the performances of green PHOLEDs with high efficiency, stability, and electrical performance are discussed.

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Modification of Dielectric Surface in Organic Thin-Film Transistor with Organic Molecule

  • Kim, Jong-Moo;Lee, Joo-Won;Kim, Young-Min;Park, Jung-Soo;Kim, Jai-Kyeong;Ju, Byeong-Kwon;Oh, Myung-Hwan;Kim, Jong-Seung;Jang, Jin
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.1030-1033
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    • 2004
  • We herewith report for the effect of dielectric surface modification on the electrical characteristics of organic thin-film transistors (OTFTs). The kist-jm-1 as an organic molecule for the surface modification is deposited onto the surface of zirconium oxide ($ZrO_2$) gate dielectric layer. The OTFTs are elaborated on the flexible plastic substrates through 4-level mask process to yield a simple fabrication process. In this work, we also have examined the dependence of electrical performance on the interface surface state of gate dielectric/pentacene, which may be modified by chemical properties in the gate dielectric surface.

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유기 박막 트랜지스터의 문턱전압 변화를 보상하기 위한 새로운 구조의 AMOLED 화소 회로에 관한 연구 (A New AMOLED Pixel Circuit Compensating for Threshold Voltage Shift of OTFT)

  • 최종찬;심아람;이재인;윤봉노;성만영
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.95-96
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    • 2008
  • A new voltage-driven pixel circuit using soluble-processed organic thin film transistors (OTFTs) for an active matrix organic light emitting diode (AMOLED) is proposed. The proposed circuit is composed of four switching TFTs, one driving TFT and one storage capacitor. The proposed circuit can compensate for the degradation of OLED current caused by the threshold voltage shift of the OTFT. The simulation results show that the variation of OLED current corresponding to a 3V threshold voltage shift is decreased by 30% compared to the conventional 2TlC structure.

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Inorganic Printable Materials for Thin-Film Transistors: Conductor and Semiconductor

  • Jeong, Sun-Ho;Song, Hae-Chon;Lee, Byung-Seok;Lee, Ji-Yoon;Choi, Young-Min;Ryu, Beyong-Hwan
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2010년도 춘계학술발표대회
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    • pp.18.2-18.2
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    • 2010
  • For the past a few years, we have intensively researched the printable inorganic conductors and ZnO-based amorphous oxide semiconductors (AOSs) for thin-film transistors. For printable conductor materials, we have focused on the aqueous Ag and Cu ink which possess a variety of advantages, comparing with the conventional metal inks based on organic solvent system. The aqueous Ag ink was designed to achieve the long-term dispersion stability using a specific polymer which can act as a dispersant and capping agent, and the aqueous Cu ink was carefully formulated to endow the oxidation stability in air and even aqueous solvent system. The both inks were successfully printed onto either polymer or glass substrate, exhibiting the superior conductivity comparable to that of bulk one. For printable ZnO-based AOSs, we have researched the noble way to resolve the critical problem, a high processing-temperature above $400^{\circ}C$, and recently discovered that Ga doping in ZnO-based AOSs promotes the formation of oxide lattice structures with oxygen vacancies at low annealing-temperatures, which is essential for acceptable thin-film transistor performance. The mobility dependence on annealing temperature and AOS composition was analyzed, and the chemical role of Ga are clarified, as are requirements for solution-processed, low-temperature annealed AOSs.

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유기박막트랜지스터 응용을 위해 플라즈마 중합된 Styrene 게이트 절연박막 (Plasma Polymerized Styrene for Gate Insulator Application to Pentacene-capacitor)

  • 황명환;손영도;우인성;바산바트호약;임재성;신백균
    • 한국진공학회지
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    • 제20권5호
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    • pp.327-332
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    • 2011
  • ITO가 코팅된 유리 기판 위에 플라즈마 중합법으로 styrene 고분자 박막을 제작하고 상부 전극을 진공 열증착법으로 제작된 Au 박막으로 한 MIM (metal-insulator-metal) 소자를 제작하였다. 또한, 플라즈마 중합된 styrene 고분자 박막을 유기 절연박막으로 하고 진공열증착법으로 pentacene 유기반도체 박막을 제작하여 유기 MIS (metal-insulator-semiconductor) 소자를 제작하였다. 플라즈마 중합법으로 제작된 styrene (ppS; plasma polymerized styrene) 고분자 박막은 styrene 단량체(모노머) 고유의 특성을 유지하면서 고분자 박막을 형성함을 확인하였으며, 통상적인 중합법으로 제작된 고분자 박막 대비 k=3.7의 높은 유전상수 값을 보였다. MIM 및 MIS 소자의 I-V 및 C-V 측정을 통하여 ppS 고분자 박막은 전계강도 $1MVcm^{-1}$에서 전류밀도 $1{\times}10^{-8}Acm^{-2}$ 수준의 낮은 누설전류를 보이고 히스테리시스가 거의 없는 우수한 절연체 박막임이 판명되었다. 결과적으로 유기박막 트랜지스터 및 유기 메모리 등 플렉서블 유기전자소자용 절연체 박막으로의 응용이 기대된다.

Electrical properties of Organic TFT patterned by shadow-mask with all layer

  • 이주원;김재경;장진;주병권
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.543-544
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    • 2006
  • Pentacene thin film transistors fabricated without photolithographic patterning were fabricated on the plastic substrates. Both the organic/inorganic thin films and metallic electrode were patterned by shifting the position of the shadow mask which accompanies the substrate throughout the deposition process. By using an optically transparent zirconium oxide ($ZrO_2$) as a gate insulator and octadecyltrimethoxysilane (OTMS) as an organic molecule for self-assembled monolayer (SAM) to increase the adhesion between the plastic substrate and gate insulator and the mobility with surface treatment, high-performance transistor with field effect mobility $.66\;cm^2$/V s and $I_{on}/I_{off}$>$10^5$ was formed on the plastic substrate. This technique will be applicable to all structure deposited at low temperature and suitable for an easy process for flexible display.

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Polylmide를 게이트 절연층으로 사용한 유기 박막 트랜지스터의 전기적 특성에 관한 연구 (A study on electrical characteristics of organic thin film transistor using polyimide for gate dielectric layer)

  • 김옥병;김윤명;김영관;김정수
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 C
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    • pp.1754-1756
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    • 2000
  • Organic semiconductors based on fused-ring polycyclic aromatic hydrocarbon have great potential to be utilized as an active layer for electronic and optoelectronic devices. In this study, pentacene thin films and electrode materials were deposited by Organic Molecular Beam Deposition(OMBD) and vacuum evaporation respectively. For the gate dielectric, polyamic acid was spin-coated and cured into polyimide at 350$^{\circ}C$. Electrical characteristics of the devices were investigated, where the channel length and width was 50${\mu}m$ and 5mm. It was found that field effect mobility was 0.012$cm^{2}/Vs$, and on/off current ratio was $10^5$.

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