• Title/Summary/Keyword: optimaization

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Developement of an Optimization Model for Freeway Entrance-Ramp Metering (고속도로시스템의 정주기식 램프미터링을 위한 최적화모형의 개발)

  • 김영찬;빈미영
    • Journal of Korean Society of Transportation
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    • v.13 no.4
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    • pp.117-132
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    • 1995
  • Peak-period congestion is a frequent occurrence on many freeways. Entrance-metering is an effective strategey in improving urban freeway traffic condition. This paper describes the prodecure to develop a computer program for proparing optimum ramp-metering stategies. Four existing ramp-metering optimaization models wer reviewed and evaluated in regared to their theories and actural performances. A optimization model was proposed in this paper. Final model takes aform of quadratic programming. The performance of the propeosed model wastest using FREFLO.

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An implementation of network optimaization system using GIS (GIS를 이용한 네트워트 최적화 시스템 구축)

  • 박찬규;이상욱;박순달;성기석;진희채
    • Korean Management Science Review
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    • v.17 no.1
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    • pp.55-64
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    • 2000
  • By managing not only geographical information but also various kinds of attribute data. GIS presents useful information for decision-makings. Most of decision-making problems using GIS can be formulated into network-optimization problems. In this study we deal with the implementation of network optimization system that extracts data from the database in GIS. solves a network optimization problem and present optimal solutions through GIS' graphical user interface. We design a nitwork optimization system and present some implementation techniques by showing a prototype of the network optimization system. Our network optimization system consists of three components : the interface module for user and GIS the basic network the program module the advanced network optimization program module. To handle large-scale networks the program module including various techniques for large sparse networks is also considered, For the implementation of the network optimization system we consider two approaches : the method using script languages supported by GIS and the method using client tools of GIS. Finally some execution results displayed by the prototype version of network optimization system are given.

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Likelihood search method with variable division search

  • Koga, Masaru;Hirasawa, Kotaro;Murata, Junichi;Ohbayashi, Masanao
    • 제어로봇시스템학회:학술대회논문집
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    • 1995.10a
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    • pp.14-17
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    • 1995
  • Various methods and techniques have been proposed for solving optimization problems; the methods have been applied to various practical problems. However the methods have demerits. The demerits which should be covered are, for example, falling into local minima, or, a slow convergence speed to optimal points. In this paper, Likelihood Search Method (L.S.M.) is proposed for searching for a global optimum systematically and effectively in a single framework, which is not a combination of different methods. The L.S.M. is a sort of a random search method (R.S.M.) and thus can get out of local minima. However exploitation of gradient information makes the L.S.M. superior in convergence speed to the commonly used R.S.M..

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Application of Genetic Algorithm to Die Shape Otimization in Extrusion (압출공정중 금형 형상 최적화문제에 대한 유전 알고리즘의 적용)

  • 정제숙;황상무
    • Transactions of Materials Processing
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    • v.5 no.4
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    • pp.269-280
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    • 1996
  • A new approach to die shape optimal design in extrusion is presented. The approach consists of a FEM analysis model to predict the value of the objective function a design model to relate the die profile with the design variables and a genetic algorithm based optimaization procedure. The approach was described in detail with emphasis on our modified micro genetic algorithm. Comparison with theoretical solutions was made to examine the validity of the predicted optimal die shapes. The approach was then applied to revealing the optimal die shapes with regard to various objective functions including those for which the design sensitivities can not be deter-mined analytically.

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Study on Optimaization of Heating Element Gap in Resistance Welding using Thermoplastic resin (열가소성 수지 저항용접에서 발열체 간격의 최적화에 관한 연구)

  • Yun, Ho-Cheol;Im, Pyo;Im, Jae-Gyu
    • Proceedings of the KWS Conference
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    • 2007.11a
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    • pp.26-28
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    • 2007
  • This research is concerned with a study of failure strength evaluation on heat element gap at resistance welding. The failure strength of resistance welded joint is changed by welding factor like as current(power level), welding time(total energy), pressure etc. and another heat element factor like as number of element line, element gap etc. Tensile-shear tests were carried out with the single-lap specimen using polypropylene(PP). The failure mechanism and optimization of gap was discussed in order to explain the tensile-shear strength evaluation on heat element gap at resistance welding. Orthogonal array was used by fractional factorial design for efficient experiments.

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Clock period optimaization by gate sizing and path sensitization (게미트 사이징과 감작 경로를 이용한 클럭 주기 최적화 기법)

  • 김주호
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.1
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    • pp.1-9
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    • 1998
  • In the circuit model that outputs are latched and input vectors are successively applied at inputs, the gate resizing approach to reduce the delay of the critical pathe may not improve the performance. Since the clock period is etermined by delays of both long and short paths in combinational circuits, the performance (clock period) can be optimized by decreasing the delay of the longest path, or increasing the delay of the shortest path. In order to achieve the desired clock period of a circuit, gates lying in sensitizable long and short paths can be selected for resizing. However, the gate selection in path sensitization approach is a difficult problem due to the fact that resizing a gate in shortest path may change the longest sensitizable path and viceversa. For feasible settings of the clock period, new algorithms and corresponding gate selection methods for resizing are proposed in this paper. Our new gate selection methods prevent the delay of the longest path from increasing while resizing a gate in the shortest path and prevent the delay of the shortest path from decreasing while resizing a gate in the longest sensitizable path. As a result, each resizing step is guaranteed not to increase the clock period. Our algorithmsare teted on ISCAS85 benchmark circuits and experimental results show that the clock period can beoptimized efficiently with out gate selection methods.

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