• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.12
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• pp.1484-1493
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• 1992

In this paper, we propose the polarization coding of optical logic gates using filters and LCTV's, and represent the real-time system of an optical parallel adder to improve a carry propagation delay time. We fabricated a polarization filter for the polarization coding of a cell and an electrical system instead of an optical flip-flop which was necessary to an optical parallel adder. We used an optical fiber to play a part of decoding mask and interconnections in an optical parallel adder. The experimental results show that the polarization coding of a cell can represent 16 optical logic functions and that the implemented optical parallel adder can operate in real-time.

• Korean Journal of Optics and Photonics
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• v.13 no.5
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• pp.421-424
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• 2002

By using SOA (Semiconductor Optical Amplifier) based devices, an all-optical half adder has been successfully demonstrated at 10 Gb/s. All-optical XOR and AND gates are utilized to realize SUM and CARRY. Since SUM and CARRY have been simultaneously realized to form the all-optical half adder, complex calculation and signal processing can be achieved.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.8
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• pp.26-33
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• 1994

Optical adders using a modified signed-digit(MSD) number system have been proposed to restrict the carry propagation chain encountered in a conventional binary adder to two positions to the left. But, MSD number system must encode three different states to represent the three possible digits of MSD. In this paper, we propose the design of an optical adder based on 1-bit addition rules by using the method of symbolic substitution (SS). We show that this adder can use binary input which is used by a digital computer, as it is and be implemented by smaller system in size than MSD adder.

• Journal of the Optical Society of Korea
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• v.19 no.3
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• pp.222-227
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• 2015

We propose a new and potentially integrable scheme for the realization of an all-optical binary full adder employing two XOR gates, two AND gates, and one OR gate. The XOR gate is realized using a Mach-Zehnder interferometer (MZI) based on a semiconductor optical amplifier (SOA). The AND and OR gates are based on the nonlinear properties of a semiconductor optical amplifier. The proposed scheme is driven by two input data streams and a carry bit from the previous less-significant bit order position. In our proposed design, we achieve extinction ratios for Sum and Carry output signals of 10 dB and 12 dB respectively. Successful operation of the system is demonstrated at 10 Gb/s with return-to-zero modulated signals.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.6
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• pp.43-51
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• 2004

An optical parallel modified signed-digit(MSD) number adder system is proposed by using triple rail-coding input patterns and serial arrangement method of symbolic substitution. By combing overlapped arithmetic results. which are produced by encoding MSD input as triple rail-coding patterns. into the same patterns, symbolic substitution rules are reduced and also by using serialized and space-shifted input patterns in optical experiments, the optical adder without space-shifting operation, NOR operation and threshold operation is implemented.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.987-990
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• 1998

An optical adder for a modified signed-digit(MSD) number system using joint spatial encoding method is proposed. In order to minimize the numbers of symbolic substitution rules, nine input patterns were divided into five groups of the same addition results. For recognizing the input reference patterns, masks and reference patterns without any other spatial operations are used. This adder is implemented by smaller system in size than a conventional adder.

• Journal of the Optical Society of Korea
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• v.18 no.6
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• pp.639-645
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• 2014

In this paper, the scheme of a single module for simultaneous operation of all-optical computing circuits, namely half adder and half subtractor, are realized using semiconductor optical amplifier (SOA) based logic gates. Optical XOR gate by employing a SOA based Mach-Zehnder interferometer (MZI) configuration is used to get the sum and difference outputs. A carry signal is generated using a SOA-four wave mixing (FWM) based AND gate, whereas, the borrow is generated by employing the SOA-cross gain modulation (XGM) effect. The obtained results confirm the feasibility of our configuration by proving the good level of quality factor i.e. ~5.5, 9.95 and 12.51 for sum/difference, carry and borrow, respectively at 0 dBm of input power.

• Proceedings of the Optical Society of Korea Conference
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• 2006.07a
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• pp.159-160
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• 2006

By using 2 signals without additional input signal, an all-optical binary half adder at 10 Gbps is demonstrated. The half adder operates in single mechanism, which is XGM. By achieving this experiment, we also explored the possibilities for the enhanced complex logic operation and higher chances for multiple logic integration.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.6
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• pp.871-880
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• 1993

Conventional binary addition rules require a carry formation and propagation to the most significant bit, and lead to serial addition. Thus, the carry progapation in a binary addition stands as a hindrance to the full utilization of parallelism optics offers, Optical adders using a modified signed-digit(MSD) number system have been proposed to eliminate the carry propagation chain states to represent the three possible digits of MSD number system must encode three different states to represent the three possible digits of MSD. In the paper, we propose the design of a parallel optical adder based on 2-bit addition rules using the method of symbolic substitution(SS).

• Proceedings of the Optical Society of Korea Conference
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• 2001.02a
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• pp.74-75
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• 2001

현재의 통신망에서는 clock recovery, regeneration 등을 전기적으로 처리하고 있으나 처리속도의 한계가 있고, 미래의 초고속 네트웍은 이러한 전기적 신호처리의 속도한계를 극복하는 기술이 필요하다. 그러므로, 고속의 광교환과 광신호처리 등 광신호를 전기적으로 바꾸거나 제어하지 않고 전광으로 처리하는 기술에 대한 연구가 진행되고 있으며 이러한 전광신호 처리에 고속의 전광 논리소자가 요구된다. 초기의 전광 논리소자 연구에서는 AND, OR, NOR, XOR 등의 기본 논리 기능이 주로 구현되었으며 이를 활용하여 Shift Register, Binary counter, 전광 반가산기, 직/병렬 데이터 변환기와 같은 복합기능 논리소자의 구현 연구가 이루어지고 있다. (중략)