• Title/Summary/Keyword: number and operations

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CSD 표현의 오차를 이용한 Approximate Processing과 이를 이용한 저전력 Decimation Filter의 설계 (Low-Power Decimation Filter Using Approximate Processing with Control of Error in CSD Representation)

  • 양영모;김영우;김수원
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 추계종합학술대회 논문집
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    • pp.236-239
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    • 1999
  • This paper describes a low-power design of decimation filter. To reduce power consumption, an approximate processing method which controls the error in canonic signed digit(CSD) coefficients is proposed. The CSD representation reduces the number of operations by representing multiplications with add and shift operations. The proposed method further reduces the number of operations by controlling the error of CSD coefficient. Processor type architecture is used to implement the proposed method. Simulation result shows that the number of operations is reduced to 56%, 35% and 10% at each approximated filter level.

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실수 연산의 기본 성질에 대한 고등학교 2학년 학생들의 이해와 적용 능력 분석 (A Study on Understanding and Application Ability of Eleventh Graders for Basic Properties of Operations with Real Numbers)

  • 진진욱;신현용
    • 한국수학교육학회지시리즈A:수학교육
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    • 제45권1호
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    • pp.61-74
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    • 2006
  • The ability of understanding the number and number systems, grasping the properties of number systems, and manipulating number systems is the foundation to understand algebra. It is useful to deepen students' mathematical understanding of number systems and operations. The authentic understanding of numbers and operations can make it possible for the students to manipulate algebraic symbols, to represent relationship among sets of numbers, and to use variables to investigate the properties of sets of numbers. The high school students need to understand the number systems from more abstract perspective. The purpose of this study is to study on understanding and application ability of eleventh graders of basic properties of operations with real numbers.

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A Hybrid Decimal Division Algorithm

  • Kwon Soonyoul;Choi Jonghwa;Park Jinsub;Han Seonkyoung;You Younggap
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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    • pp.225-228
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    • 2004
  • This paper presents a hybrid decimal division algorithm to improve division speed. In a binary number system, non-restoring algorithm has a smaller number of operations than restoring algorithm. In decimal number system, however, the number of operations differs with respect to quotient values. Since one digit ranges 0 to 9 in decimal, the proposed hybrid algorithm employ either non-restoring or restoring algorithm on each digit to reduce iterative operations. The selection of the algorithm is based on the remainder values. The proposed algorithm improves computation speed substantially over conventional algorithms by decreasing the number of operations.

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음의 횟수에 관한 개념 정의 및 학습화 전략 (THE DEFINITION OF NEGATIVE COUNTING NUMBER AND TEACHING MODEL)

  • 김명운
    • 대한수학교육학회지:수학교육학연구
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    • 제8권2호
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    • pp.527-540
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    • 1998
  • In the teacher's guide of mathematics textbook for the 1st grade of the middle school, the clear and logical reason why the multiplication of negative number to negative number makes positive number, and $a^{-m}$ with a>0 and m>0, is defined by ${\frac{1}{a^m}}$ is not given. When we define the multiplication or the power by successive addition or successive multiplication of the same number, respectively, we encounter this ambiguity, in the case that the number of successive operations is negative, In this paper, we name this number, negative counting number, and we make the following more logical and intuitive definition, which is "negatively many successive operations is defined by positively many successive inverse operations." According to this new definition, we define the multiplication by the successive addition or the successive subtraction of the same number, when the multiplier is positive or negative respectively, and the power by the successive multiplication or the power is positive or negative, respectively. In addition, using this new definition and following the E.R.S Instruction strategy which revised and complemented the Bruner's E.I.S Instruction strategy, we develope new teaching model available in the 1st grade class of middle school where the concept of integers, three operations of integers are introduced.ntroduced.

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Attribute-based Proxy Re-encryption with a Constant Number of Pairing Operations

  • Seo, Hwa-Jeong;Kim, Ho-Won
    • Journal of information and communication convergence engineering
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    • 제10권1호
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    • pp.53-60
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    • 2012
  • Attribute-based encryption (ABE) is an encryption scheme in which the user is able to decrypt a ciphertext with associated attributes. However, the scheme does not offer the capability of decryption to others when the user is offline. For this reason, the attribute-based proxy re-encryption (ABPRE) scheme was proposed, which combines traditional proxy re-encryption with ABE, so a user is able to empower designated users to decrypt the re-encrypted ciphertext with the associated attributes of designated users. However, previous ABPRE schemes demands a number of pairing operations that imply huge computational overhead. To reduce the number of pairing operations, we reduce the pairing operations with exponent operations. This paper provides a novel approach to an ABPRE scheme with constant pairing operation latency.

수와 연산 학습을 위한 클래스기반 학습 애플릿 개발 (Development of Class-Based Learning Applet on Numbers and Number Operations)

  • 김민정;김갑수;민미경
    • 디지털콘텐츠학회 논문지
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    • 제8권2호
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    • pp.235-243
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    • 2007
  • 수학과의 학습은 학습자가 구체적인 조작을 통해서 개념을 학습한다. 그러나 웹에서 구현되는 대부분의 콘텐츠들은 정적이며 학습자와의 상호작용에 제약이 많다. 이런 제약 조건을 극복하고 학생들의 인지적인 단계에 적합한 동적인 상호작용을 위한 콘텐츠 개발이 필요하다. 이에 본 연구에서는 초등수학에서 수와 연산 영역의 교육과정 분석하였다. 이를 기반으로 객체지향설계원리를 이용하여 학습 애플릿에 필요한 "수 클래스"를 설계하고 구현하였으며, 구현된 "수 클래스"를 기반으로 클래스기반 "수와 연산 학습 애플릿"을 개발하였다. 클래스기반 '수와 연산 학습 애플릿'은 초등학교 수학과의 '수와 연산' 영역 교육과정을 토대로 학습 주제를 선정하였으며, 각 학습 주제에 따라 소단위 프로그램으로 제작하였다. 이 학습 애플릿은 자유로운 조작과 탐구활동을 통해 수와 연산의 개념과 원리를 학습할 수 있도록 한다. 이것은 학생들의 동적인 상호 작용을 강화한다.

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Tool path planning of hole-making operations in ejector plate of injection mould using modified shuffled frog leaping algorithm

  • Dalavi, Amol M.;Pawar, Padmakar J.;Singh, Tejinder Paul
    • Journal of Computational Design and Engineering
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    • 제3권3호
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    • pp.266-273
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    • 2016
  • Optimization of hole-making operations in manufacturing industry plays a vital role. Tool travel and tool switch planning are the two major issues in hole-making operations. Many industrial applications such as moulds, dies, engine block, automotive parts etc. requires machining of large number of holes. Large number of machining operations like drilling, enlargement or tapping/reaming are required to achieve the final size of individual hole, which gives rise to number of possible sequences to complete hole-making operations on the part depending upon the location of hole and tool sequence to be followed. It is necessary to find the optimal sequence of operations which minimizes the total processing cost of hole-making operations. In this work, therefore an attempt is made to reduce the total processing cost of hole-making operations by applying relatively new optimization algorithms known as shuffled frog leaping algorithm and proposed modified shuffled frog leaping algorithm for the determination of optimal sequence of hole-making operations. An industrial application example of ejector plate of injection mould is considered in this work to demonstrate the proposed approach. The obtained results by the shuffled frog leaping algorithm and proposed modified shuffled frog leaping algorithm are compared with each other. It is seen from the obtained results that the results of proposed modified shuffled frog leaping algorithm are superior to those obtained using shuffled frog leaping algorithm.

Block Filtering과 QFT를 이용한 실시간 음장 효과구현 (Real-Tim Sound Field Effect Implementation Using Block Filtering and QFT)

  • 손성용;서정일;한민수
    • 대한음성학회지:말소리
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    • 제51호
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    • pp.85-98
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    • 2004
  • It is almost impossible to generate the sound field effect in real time with the time-domain linear convolution because of its large multiplication operation requirement. To solve this, three methods are introduced to reduce the number of multiplication operations in this paper. Firstly, the time-domain linear convolution is replaced with the frequency-domain circular convolution. In other words, the linear convolution result can be derived from that of the circular convolution. This technique reduces the number of multiplication operations remarkably, Secondly, a subframe concept is introduced, i.e., one original frame is divided into several subframes. Then the FFT is executed for each subframe and, as a result, the number of multiplication operations can be reduced. Finally, the QFT is used in stead of the FFT. By combining all the above three methods into our final the SFE generation algorithm, the number of computations are reduced sufficiently and the real-time SFE generation becomes possible with a general PC.

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전동기 제조업의 공정과 자재의 동기화에 관한 연구 (Synchronization of Production Operations and Material Supplies in the Electric Motor Manufacturing)

  • 송정수;김재균;이지형
    • 산업공학
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    • 제11권2호
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    • pp.199-209
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    • 1998
  • In manufacturing industries, one of the critical issues is to synchronize the sequence of production operations with materials needed at each operation to improve productivity. In order to solve this synchronization problem. We develop a code system entitled 'Work-Order-Number' for automated storage/retrieval systems(AS/RS) in this paper. The Work-Order-Number is designed for the purpose of integrating the engineering information. material handling, production and operations scheduling, point of production, and AS/RS systems. This paper implemented the Work-Order-Number in the electric motor manufacturing. The results of the implementation showed the reduction of the number of workers in material handling and cost-loss due lo a late delivery.

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Buffer Policy based on High-capacity Hybrid Memories for Latency Reduction of Read/Write Operations in High-performance SSD Systems

  • Kim, Sungho;Hwang, Sang-Ho;Lee, Myungsub;Kwak, Jong Wook;Park, Chang-Hyeon
    • 한국컴퓨터정보학회논문지
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    • 제24권7호
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    • pp.1-8
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    • 2019
  • Recently, an SSD with hybrid buffer memories is actively researching to reduce the overall latency in server computing systems. However, existing hybrid buffer policies caused many swapping operations in pages because it did not consider the overall latency such as read/write operations of flash chips in the SSD. This paper proposes the clock with hybrid buffer memories (CLOCK-HBM) for a new hybrid buffer policy in the SSD with server computing systems. The CLOCK-HBM constructs new policies based on unique characteristics in both DRAM buffer and NVMs buffer for reducing the number of swapping operations in the SSD. In experimental results, the CLOCK-HBM reduced the number of swapping operations in the SSD by 43.5% on average, compared with LRU, CLOCK, and CLOCK-DNV.