• Title/Summary/Keyword: nonvolatile

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Organic-Inorganic Nanohybrid Structure for Flexible Nonvolatile Memory Thin-Film Transistor

  • Yun, Gwan-Hyeok;Kalode, Pranav;Seong, Myeong-Mo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.118-118
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    • 2011
  • The Nano-Floating Gate Memory(NFGM) devices with ZnO:Cu thin film embedded in Al2O3 and AlOx-SAOL were fabricated and the electrical characteristics were evaluated. To further improve the scaling and to increase the program/erase speed, the high-k dielectric with a large barrier height such as Al2O3 can also act alternatively as a blocking layer for high-speed flash memory device application. The Al2O3 layer and AlOx-SAOL were deposited by MLD system and ZnO:Cu films were deposited by ALD system. The tunneling layer which is consisted of AlOx-SAOL were sequentially deposited at $100^{\circ}C$. The floating gate is consisted of ZnO films, which are doped with copper. The floating gate of ZnO:Cu films was used for charge trap. The same as tunneling layer, floating gate were sequentially deposited at $100^{\circ}C$. By using ALD process, we could control the proportion of Cu doping in charge trap layer and observe the memory characteristic of Cu doping ratio. Also, we could control and observe the memory property which is followed by tunneling layer thickness. The thickness of ZnO:Cu films was measured by Transmission Electron Microscopy. XPS analysis was performed to determine the composition of the ZnO:Cu film deposited by ALD process. A significant threshold voltage shift of fabricated floating gate memory devices was obtained due to the charging effects of ZnO:Cu films and the memory windows was about 13V. The feasibility of ZnO:Cu films deposited between Al2O3 and AlOx-SAOL for NFGM device application was also showed. We applied our ZnO:Cu memory to thin film transistor and evaluate the electrical property. The structure of our memory thin film transistor is consisted of all organic-inorganic hybrid structure. Then, we expect that our film could be applied to high-performance flexible device.----못찾겠음......

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poly (methylmethacrylate)층에 분산되어 있는 CdTe-CdSe 코어-쉘 나노입자를 사용하여 제작한 비휘발성 메모리 소자의 메모리 메카니즘

  • Yun, Dong-Yeol;Son, Jeong-Min;Kim, Tae-Hwan;Kim, Seong-U;Kim, Sang-Uk
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.272-272
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    • 2011
  • 무기물 나노입자를 포함하는 유기물/무기물 나노복합체는 차세대 전자 소자에 쉽게 적용이 가능하고 응용 잠재적 능력이 뛰어나기 때문에 차세대 비휘발성 메모리 소자에 응용하려는 연구가 세계적으로 활발히 진행되고 있다. 본 연구에서는 poly (methylmethacrylate) (PMMA) 절연성 고분자 박막 안에 CdTe와 CdTe-CdSe 코어-쉘 나노입자를 각각 분산시켜 이를 전하의 저장 매체로 사용하는 메모리 소자를 제작하였다. 제작된 각각의 소자에 대한 메모리 메카니즘과 PMMA 박막 안에 분포되어 있는 CdTe-CdSe 코어-쉘 나노입자에서 CdSe 쉘의 전기적 영향에 대하여 연구하였다. 소자에 필요한 용액을 제작하기 위해 서로 다른 용매에 녹아 있는 CdTe-CdSe 나노입자와 PMMA를 혼합하였다. Al 금속을 하부 전극으로 증착한 p-Si (100) 기판 위에 나노입자와 PMMA가 혼합된 용액을 스핀 코팅 방법을 사용하여 박막을 형성한 후, 남아있는 용매를 제거하기 위해 열처리를 하였다. 용매가 모두 제거된 박막위에 금속 마스크를 사용하여 상부 Al 전극을 열증착 방법으로 형성하였다. 나노입자가 포함된 고분자 박막의 메모리 특성을 비교하기 위하여 나노입자가 없는 PMMA층만으로 형성된 소자도 같은 방법으로 제작하였다. 세 가지 종류의 소자에 고주파 정전용량-전압 (C-V) 측정을 한 결과 나노입자가 분산된 PMMA 층으로 제작된 소자에서만 평탄 전압 이동이 관찰되었으며, 이것은 나노입자를 전하 포획 장소로 사용할 수 있다는 것을 확인하였다. 정전용량-시간 (C-t) 측정을 하여 나노입자가 포함된 PMMA 층으로 제작된 메모리 소자의 안정성을 관찰하였다. C-V와 C-t 측정 자료를 바탕으로 제작된 메모리 소자의 메모리 메카니즘과 CdTe-CdSe 코어-쉘 나노입자에서 CdSe 쉘의 역할을 설명하였다.

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A Study on the Etcting Technology for Metal Interconnection on Low-k Polyimide (Low-k Polyimide상의 금속배선 형성을 위한 식각 기술 연구)

  • Mun, Ho-Seong;Kim, Sang-Hun;An, Jin-Ho
    • Korean Journal of Materials Research
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    • v.10 no.6
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    • pp.450-455
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    • 2000
  • For further scaling down of the silicon devices, the application of low dielectric constant materials instead of silicon oxide has been considered to reduce power consumption, crosstalk, and interconnection delay. In this paper, the effect of $O_2/SF_6$ plasma chemistry on the etching characteristics of polyimide-one of the promising low-k interlayer dielectrics-has been studied. The etch rate of polyimide decreases with the addition of $SF_6$ gas due to formation of nonvolatile fluorine compounds inhibiting reaction between oxygen and hydrocarbon polymer, while applying substrate bias enhances etching process through physical attack. However, addition of small amount of $SF_6$ is desirable for etching topography. $SiO_2$ hard mask for polyimide etching is effective under $O_2$plasma etching(selectivity~30), while $O_2/SF_6$ chemistry degrades etching selectivity down to 4. Based on the above results, $1-2\mu\textrm{m}$ L&S PI2610 patterns were successfully etched.

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The Characteristics of Chalcogenide $Ge_1Se_1Te_2$ Thin Film for Nonvolatile Phase Change Memory Device (비휘발성 상변화메모리소자에 응용을 위한 칼코게나이드 $Ge_1Se_1Te_2$ 박막의 특성)

  • Lee, Jae-Min;Chung, Hong-Bay
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.6
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    • pp.297-301
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    • 2006
  • In the present work, we investigate the characteristics of new composition material, chalcogenide $Ge_1Se_1Te_2$ material in order to overcome the problems of conventional PRAM devices. The Tc of $Ge_1Se_1Te_2$ bulk was measured $231.503^{\circ}C$ with DSC analysis. For static DC test mode, at low voltage, two different resistances are observed. depending on the crystalline state of the phase-change resistor. In the first sweep, the as-deposited amorphous $Ge_1Se_1Te_2$ showed very high resistance. However when it reached the threshold voltage(about 11.8 V), the electrical resistance of device was drastically reduced through the formation of an electrically conducting path. The phase transition between the low conductive amorphous state and the high conductive crystal]me state was caused by the set and reset pulses respectively which fed through electrical signal. Set pulse has 4.3 V. 200 ns. then sample resistance is $80\sim100{\Omega}$. Reset pulse has 8.6 V 80 ns, then the sample resistance is $50{\sim}100K{\Omega}$. For such high resistance ratio of $R_{reset}/R_{set}$, we can expect high sensing margin reading the recorded data. We have confirmed that phase change properties of $Ge_1Se_1Te_2$ materials are closely related with the structure through the experiment of self-heating layers.

Changes of Chemical Components in Persimmon Leaves (Diospyros kaki Thunberg) during Growth (감잎의 성장시기에 따른 화학성분 변화)

  • 김종국;이원영
    • Journal of the East Asian Society of Dietary Life
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    • v.12 no.1
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    • pp.32-37
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    • 2002
  • In order to promote the utilization of persimmon leaf as food, chemical components in freeze dried Persimmon leaves were analyzed. The proximate composition was composed of moisture(79.65%), crude protein(17.97%), crude fat(1.33%), ash(2.37%), crude fiber(2.01%). During growth, moisture content was decreased and crude fat, crude fiber and ash were increased, respectively. Free sugar was composed of glucose, fructose, sucrose, raffinose. Nonvolatile organic acid contents were composed of oxalic acid, levulenic acid, magic acid and citric acid in the order. 18 amino acids of total amino acid in persimmon leaves were detected and major amino acid were glutamic acid, aspartic acid, leucine, phenylalanine, arginine and valine. The soluble tannin and vitamin C of persimmon leaves were 6859.37 mg% and 1487.12 mg%. During growth, its contents increased and then decreased after 20th June.

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Low-temperature crystallization of high-dielectric (Ba,Sr)$TiO_3$ thin films for embedded capacitors

  • Cho, Kwang-Hwan;Kang, Min-Gyu;Kang, Chong-Yun;Yoon, Seok-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.03a
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    • pp.21-21
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    • 2010
  • (Ba,Sr)$TiO_3$ (BST) thin film with a perovskite structure has potential for the practical application in various functional devices such as nonvolatile-memory components, capacitor, gate insulator of thin-film transistors, and electro-optic devices for display. Normally, the BST thin films derived from sol-gel and sputtering are amorphous or partially crystalline when processed below $600^{\circ}C$. For the purpose of integrating BST thin film directly into a Si-based read-out integrated circuit (ROIC), it is necessary to process the BST film below $400^{\circ}C$. The microstructural and electrical properties of low-temperature crystallized BST film were studied. The BST thin films have been fabricated at $350^{\circ}C$ by UV-assisted rapidly thermal annealing (RTA). The BST films are in a single perovskite phase and have well-defined electrical properties such as high dielectric constant, low dielectric loss, low leakage current density, and high breakdown voltage. Photoexcitation of the organics contained in the sol-gel-derived films by high-intensity UV irradiation facilitates elimination of the organics and formation of the single-crystalline phase films at low temperatures. The amorphous BST thin film was transformed to a highly (h00)-oriented perovskite structure by high oxygen pressure processing (HOPP) at as low as $350^{\circ}C$. The dielectric properties of BST film were comparable to (or even better than) those of the conventionally processed BST films prepared by sputtering or post-annealing at temperature above $600^{\circ}C$. When external pressure was applied to the well-known contractive BST system during annealing, the nucleation energy barrier was reduced; correspondingly, the crystallization temperature decreased. The UV-assisted RTA and HOPP, as compatible with existing MOS technology, let the BST films be integrated into radio-frequency circuit and mixed-signal integrated circuit below the critical temperature of $400^{\circ}C$.

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A Study on the Structure and Electrical Properties of CeO$_2$ Thin Film (CeO$_2$ 박막의 구조적, 전기적 특성 연구)

  • 최석원;김성훈;김성훈;이준신
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.469-472
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    • 1999
  • CeO$_2$ thin films have used in wide applications such as SOI, buffer layer, antirflection coating, and gate dielectric layer. CeO$_2$takes one of the cubic system of fluorite structure and shows similar lattice constant (a=0.541nm) to silicon (a=0.543nm). We investigated CeO$_2$films as buffer layer material for nonvolatile memory device application of a single transistor. Aiming at the single transistor FRAM device with a gate region configuration of PZT/CeO$_2$ /P-Si , this paper focused on CeO$_2$-Si interface properties. CeO$_2$ films were grown on P-type Si(100) substrates by 13.56MHz RF magnetron sputtering system using a 2 inch Ce metal target. To characterize the CeO$_2$ films, we employed an XRD, AFM, C-V, and I-V for structural, surface morphological, and electrical property investigations, respectively. This paper demonstrates the best lattice mismatch as low as 0.2 % and average surface roughness down to 6.8 $\AA$. MIS structure of CeO$_2$ shows that breakdown electric field of 1.2 MV/cm, dielectric constant around 13.6 at growth temperature of 200 $^{\circ}C$, and interface state densities as low as 1.84$\times$10$^{11}$ cm $^{-1}$ eV$^{-1}$ . We probes the material properties of CeO$_2$ films for a buffer layer of FRAM applications.

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Electrical Characteristics of Charge Trap Flash Memory with a Composition Modulated (ZrO2)x(Al2O3)1-x Film

  • Tang, Zhenjie;Zhang, Jing;Jiang, Yunhong;Wang, Guixia;Li, Rong;Zhu, Xinhua
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.3
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    • pp.130-134
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    • 2015
  • This research proposes the use of a composition modulated (ZrO2)x(Al2O3)1-x film as a charge trapping layer for charge trap flash memory; this is possible when the Zr (Al) atomic percent is controlled to form a variable bandgap as identified by the valence band offsets and electron energy loss spectrum measurements. Compared to memory devices with uniform compositional (ZrO2)0.1(Al2O3)0.9 or a (ZrO2)0.92(Al2O3)0.08 trapping layer, the memory device using the composition modulated (ZrO2)x(Al2O3)1-x as the charge trapping layer exhibits a larger memory window (6.0 V) at the gate sweeping voltage of ±8 V, improved data retention, and significantly faster program/erase speed. Improvements of the memory characteristics are attributed to the special energy band alignments resulting from non-uniform distribution of elemental composition. These results indicate that the composition modulated (ZrO2)x(Al2O3)1-x film is a promising candidate for future nonvolatile memory device applications.

A 2.5-V, 1-Mb Ferroelectric Memory Design Based on PMOS-Gating Cell Structure (PMOS 게이팅 셀 기반 2.5-V, 1-Mb 강유전체 메모리 설계)

  • Kim, Jung-Hyun;Chung, Yeonbae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.10 s.340
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    • pp.1-8
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    • 2005
  • In this paper, a FRAM design style based on PMOS-gating cell structure is described. The memory cell consists of a PMOS access transistor and a ferroelectric capacitor. Its plate is grounded. The proposed scheme employs three novel operating methods: 1) $V_{DD}$ precharged bitline, 2) negative-voltage wordline technique and 3) negative-pulse restore, Because this configuration doesn`t need the on-pitch plate control circuitry, it is effective in realizing cost-effective chip sizes. Implementation for a 2.5-V, 1-Mb FRAM prototype design in a $0.25-{\mu}m$, triple-well technology shows a chip size of $3.22\;mm^{2}$, an access time of 48 ns and an active current of 11 mA. The cell efficiency is 62.52 $\%$. It has gained approximately $20\;\%$ improvement in the cell array efficiency over the conventional plate-driven FRAM scheme.

Realization of full magnetoelectric control at room temperature

  • Chun, Sae-Hwan;Chai, Yi-Sheng;Oh, Yoon-Seok;Kim, In-Gyu;Jeon, Byung-Gu;Kim, Han-Bit;Jeon, Byeong-Jo;Haam, S.Y.;Chung, Jae-Ho;Park, Jae-Hoon;Kim, Kee-Hoon
    • Proceedings of the Korean Magnestics Society Conference
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    • 2011.12a
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    • pp.101-101
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    • 2011
  • The control of magnetization by an electric field at room temperature remains as one of great challenges in materials science. Multiferroics, in which magnetism and ferroelectricity coexist and couple to each other, could be the most plausible candidate to realize this long-sought capability. While recent intensive research on the multiferroics has made significant progress in sensitive, magnetic control of electric polarization, the electrical control of magnetization, the converse effect, has been observed only in a limited range far below room temperature. Here we demonstrate at room temperature the control of both electric polarization by a magnetic field and magnetization by an electric field in a multiferroic hexaferrite. The electric polarization rapidly increases in a magnetic field as low as 5 mT and the magnetoelectric susceptibility reaches up to 3200 ps/m, the highest value in single phase materials. The magnetization is also modulated up to 0.34 mB per formula unit in an electric field of 1.14 MV/m. Furthermore, this compound allows nonvolatile, magnetoelectric reading- and writing-operations entirely at room temperature. Four different magnetic/electric field writing conditions generate repeatable, distinct M versus E curves without dissipation, offering an unprecedented opportunity for a multi-bit memory or a spintronic device applications.

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