• Title/Summary/Keyword: negative bias stress

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Effective Positive Bias Recovery for Negative Bias Stressed sol-gel IGZO Thin-film Transistors (음 바이어스 스트레스를 받은 졸-겔 IGZO 박막 트랜지스터를 위한 효과적 양 바이어스 회복)

  • Kim, Do-Kyung;Bae, Jin-Hyuk
    • Journal of Sensor Science and Technology
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    • v.28 no.5
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    • pp.329-333
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    • 2019
  • Solution-processed oxide thin-film transistors (TFTs) have garnered great attention, owing to their many advantages, such as low-cost, large area available for fabrication, mechanical flexibility, and optical transparency. Negative bias stress (NBS)-induced instability of sol-gel IGZO TFTs is one of the biggest concerns arising in practical applications. Thus, understanding the bias stress effect on the electrical properties of sol-gel IGZO TFTs and proposing an effective recovery method for negative bias stressed TFTs is required. In this study, we investigated the variation of transfer characteristics and the corresponding electrical parameters of sol-gel IGZO TFTs caused by NBS and positive bias recovery (PBR). Furthermore, we proposed an effective PBR method for the recovery of negative bias stressed sol-gel IGZO TFTs. The threshold voltage and field-effect mobility were affected by NBS and PBR, while current on/off ratio and sub-threshold swing were not significantly affected. The transfer characteristic of negative bias stressed IGZO TFTs increased in the positive direction after applying PBR with a negative drain voltage, compared to PBR with a positive drain voltage or a drain voltage of 0 V. These results are expected to contribute to the reduction of recovery time of negative bias stressed sol-gel IGZO TFTs.

The Effect of Light on Amorphous Silicon Thin Film Transistors based on Photo-Sensor Applications

  • Ha, Tae-Jun;Park, Hyun-Sang;Kim, Sun-Jae;Lee, Soo-Yeon;Han, Min-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.953-956
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    • 2009
  • We have investigated the effect of light on amorphous silicon thin film transistors based photo-sensor applications. We have analyzed the instability caused by electrical gate bias stresses under the light illumination and the effect of photo-induced quasi-annealing on the instability. Threshold voltage ($V_{TH}$) under the negative gate bias stress with light illumination was more decreased than that under the negative gate bias stress without light illumination even though $V_{TH}$ caused by the light-induced stress without negative gate bias was shifted positively. These results are because the increase of carrier density in a channel region caused by the light illumination has the enhanced effect on the instability caused by negative gate bias stress. The prolonged light illumination led to the recovery of shifted VTH caused by negative gate bias stress under the light illumination due to the recombination of trapped hole charges.

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Effect of Alternate Bias Stress on p-channel poly-Si TFT`s (P-채널 다결정 실리콘 박막 트랜지스터의 Alternate Bias 스트레스 효과)

  • 김영호;조봉희;강동헌;길상근;임석범;임동준
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.14 no.11
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    • pp.869-873
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    • 2001
  • The effects of alternate bias stress on p-channel poly-Si TFT\`s has been systematically investigated. We alternately applied positive and negative bias stress on p-channel poly-Si TFT\`s, device Performance(V$\_$th/, g$\_$m/, leakage current, S-slope) are alternately appeared to be increasing and decreasing. It has been shown that device performance degrade under the negative bias stress while improve under the positive bias stress. This effects have been related to the hot carrier injection into the gate oxide rather than the generation of defect states within the poly-Si/SiO$_2$ interface under alternate bias stress.

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Negative Bias Stress Effect with Offset Structure in Poly-Si TFT's (Offset 구조 Poly-Si TFT의 Negative Bias Stress 효과)

  • 이제혁;변문기;임동규;조봉희;김영호
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.11a
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    • pp.141-144
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    • 1998
  • The electrical characteristics of poly-Si TFT's with offset structure by negative bias stress are systematically investigated as a function of offset length. The changes of electrical characteristics, V$\_$th/, off-current, on/off ratio, in the offset structured poly-Si TFT's are smaller than that of the conventional structured poly-Si TFT's under the stress condition (V$\_$ds/=20V, V$\_$gs/=-20V). It is found that the hot carrier effect by negative bias stress is suppressed by the offset structured poly-Si TFT's because the local electric field near the drain region is decreased by offset region.

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Effect of Alternate Bias Stress on p-channel poly-Si TFT's (P-채널 poly-Si TFT's의 Alternate Bias 스트레스 효과)

  • 이제혁;변문기;임동규;정주용;이진민
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.489-492
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    • 1999
  • The effects of alternate bias stress on p-channel poly-Si TPT's has been systematically investigated. It has been shown that the application of alternate bias stress affects device degradation for the negative bias stress as well as device improvement for the positive bias stress. This effects have been related to the hot carrier injection into the gate oxide rather than the generation of defect states within the poly-Si/SiO$_2$ under bias stress.

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The Relation Between Affective Style Based on EEG Asymmetry and Personality on Stress

  • Seo, Ssang-Hee;Lee, Jung-Tae;Chong, Young-Suk
    • Journal of Biomedical Engineering Research
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    • v.30 no.4
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    • pp.288-293
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    • 2009
  • This study investigates the relationship of affective style based on EEG asymmetry, personality, and psychological stress on stress. The experiment consists of three sessions: rest state, landscape scene, and horror film tasks. We used a short horror film to evoke stress. We classified affective style of the individual based on EEG alpha asymmetry: negative bias, positive bias and general. The participants in the negative bias group reported higher levels of stress on the neuroticism of the Big 5 model and Cohen's Perceived Stress Scale. These results demonstrate that participants with the propensity for negative affective style have a nervous temperament and are apt to be stressed.

Influence of Channel Thickness Variation on Temperature and Bias Induced Stress Instability of Amorphous SiInZnO Thin Film Transistors

  • Lee, Byeong Hyeon;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.1
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    • pp.51-54
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    • 2017
  • TFTs (thin film transistors) were fabricated using a-SIZO (amorphous silicon-indium-zinc-oxide) channel by RF (radio frequency) magnetron sputtering at room temperature. We report the influence of various channel thickness on the electrical performances of a-SIZO TFTs and their stability, using TS (temperature stress) and NBTS (negative bias temperature stress). Channel thickness was controlled by changing the deposition time. As the channel thickness increased, the threshold voltage ($V_{TH}$) of a-SIZO changed to the negative direction, from 1.3 to -2.4 V. This is mainly due to the increase of carrier concentration. During TS and NBTS, the threshold voltage shift (${\Delta}V_{TH}$) increased steadily, with increasing channel thickness. These results can be explained by the total trap density ($N_T$) increase due to the increase of bulk trap density ($N_{Bulk}$) in a-SIZO channel layer.

Effects of electrical stress on low temperature p-channel poly-Si TFT′s (저온에서 제작된 p-채널 poly-Si TFT의 전기적 스트레스 효과)

  • 백희원;임동규;임석범;정주용;이진민;김영호
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.324-327
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    • 2000
  • In this paper, the effects of negative and positive bias stress on p-channel poly-Si TFT's fabricated by excimer laser annealing have been investigated After positive and negative bias stress, transcon-ductance(g$_{m}$) is increased because of a reduction of the effective channel length due to the injected electron in the gate oxide. In the positive bias stress, the injection of hole is appeared after stress time of 3600sec and g$_{m}$ is decreased. On the other hand, the gate voltage at the maximum g$_{m}$, S-swing and threshold voltage(V$_{th}$) are decreased because of the interface state generation due to the injection of electrons into the gate oxide.e.ide.e.

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Light Effects on the Bias Stability of Transparent ZnO Thin Film Transistors

  • Shin, Jae-Heon;Lee, Ji-Su;Hwang, Chi-Sun;KoPark, Sang-Hee;Cheong, Woo-Seok;Ryu, Min-Ki;Byun, Chun-Won;Lee, Jeong-Ik;Chu, Hye-Yong
    • ETRI Journal
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    • v.31 no.1
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    • pp.62-64
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    • 2009
  • We report on the bias stability characteristics of transparent ZnO thin film transistors (TFTs) under visible light illumination. The transfer curve shows virtually no change under positive gate bias stress with light illumination, while it shows dramatic negative shifts under negative gate bias stress. The major mechanism of the bias stability under visible illumination of our ZnO TFTs is thought to be the charge trapping of photo-generated holes at the gate insulator and/or insulator/channel interface.

Anomalous Stress-Induced Hump Effects in Amorphous Indium Gallium Zinc Oxide TFTs

  • Kim, Yu-Mi;Jeong, Kwang-Seok;Yun, Ho-Jin;Yang, Seung-Dong;Lee, Sang-Youl;Lee, Hi-Deok;Lee, Ga-Won
    • Transactions on Electrical and Electronic Materials
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    • v.13 no.1
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    • pp.47-49
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    • 2012
  • In this paper, we investigated the anomalous hump in the bottom gate staggered a-IGZO TFTs. During the positive bias stress, a positive threshold voltage shift was observed in the transfer curve and an anomalous hump occurred as the stress time increased. The hump became more serious in higher gate bias stress while it was not observed under the negative bias stress. The analysis of constant gate bias stress indicated that the anomalous hump was influenced by the migration of positively charged mobile interstitial zinc ion towards the top side of the a-IGZO channel layer.