• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.189-189
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• 2015

Plasmonics, sensor, field effect transistors, solar cells 등 다양한 적용분야를 가지는 실리콘 구조체는 제작공정에 의해 전기적 및 광학적 특성이 달라지기 때문에 적합한 나노구조 제작방법이 요구되고 있다. 나노구조체 제작방법으로는 Photo lithography, Extreme ultraviolet lithography (EUV), Nano imprinting lithography (NIL), Block copolymer (BCP) 방식의 방법들이 연구되고 있으며, 특히 BCP는 direct self-assembly 특성을 가지고 있으며 가격적인 면에서도 큰 장점을 가진다. 하지만 BCP를 mask로 사용하여 식각공정을 진행할 경우 BCP가 버티지 못하고 변형되어 mask로서의 역할을 하지 못한다. 이러한 문제를 해결하기 위하여 본 논문에서는 BCP와 질화막을 이용한 double mask 방법을 사용하였다. 기판 위에 BCP를 self-assembly 시키고 mask로 사용하여 hole 부분으로 노출된 기판을 Ion gun을 통해 질화 시킨 후에 BCP를 제거한다. 기판 위에 hole 모양의 질화막 표면은 BCP와 다르게 etching 공정 중 변형되지 않는다. 이러한 질화막 표면을 mask로 사용하여 pillar pattern의 실리콘 나노구조체를 제작하였다. 질화막 mask로 사용되는 template은 PS와 PMMA로 구성된 BCP를 사용하였다. 140kg/mol의 polystyrene과 65kg/mol의 PMMA를 톨루엔으로 용해시키고 실리콘 표면 위에 spin coating으로 도포하였다. Spin coat 후 230도에서 40시간 동안 열처리를 진행하여 40nm의 직경을 가진 PS-b-PMMA self-assembled hole morphology를 형성하였다. 질화막 형성 및 etching을 위한 장비로 low-energy Ion beam system을 사용하였다. Reactive Ion beam은 ICP와 3-grid system으로 구성된 Ion gun으로부터 형성된다. Ion gun에 13.56 MHz의 frequency를 갖는 200W 전력을 인가하였다. Plasma로부터 나오는 Ion은 $2{\Phi}$의 직경의 hole을 가지는 3-grid hole로 추출된다. 10~70 voltage 범위의 전위를 plasma source 바로 아래의 1st gird에 인가하고, 플럭스 조절을 위해 -150V의 전위를 2nd grid에 인가한다. 그리고 3rd grid는 접지를 시켰다. chamber내의 질화 및 식각가스 공급은 2mTorr로 유지시켰다. 그리고 기판의 온도는 냉각칠러를 이용하여 -20도로 냉각을 진행하였다. 이와 같은 공정 결과로 100 nm 이상의 높이를 갖는 40 nm직경의 균일한 Silicon pillar pattern을 형성 할 수 있었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.5
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• pp.353-357
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• 2010

Recently, silicon etching have received much attention for display industry, nano imprint technology, silicon photonics, and MEMS application. After the etching process, removing of etch mask and residue of sidewall is very important. The investigation of the etched mask removing was carried out by using the ashing, HF dipping and acid cleaning process. Experiment shows that oxygen component of reactive gas and photoresist react with silicon and converting them into the mask fence. It is very difficult to remove by using ashing or acid cleaning process because mask fence consisted of Si and O compounds. However, dilute HF dipping is very effective process for SiOx layer removing. Finally, we found optimized condition for etched mask removing.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.234-237
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• 2007

We fabricated nano-structures of the anodic aluminum oxides on sapphire substrates. Two processes of nano-structured sapphire surface have present: the one is the template mask and the other is the anodic oxidized aluminum deposited on sapphire substrate. The formation of nano-structures has investigated by FE-SEM measurement. The etched surface by the template showed periodic lattice but the deposited surface showed the randomly distributed phase of nanoholes instead of the periodic lattice.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.21 no.4
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• pp.164-168
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• 2011

Etch selectivities of mask materials to ZnO and $SnO_2$ films were studied in $BCl_3$/Ar and $CF_4$/Ar inductively coupled plasmas for fabrication of nanostructure-based gas sensing layer with high aspect ratios. In $25BCl_3$/10Ar ICP discharges, selectivities of 5.1~6.1 were obtained for ZnO over Ni while no practical selectivity was obtained for ZnO over Al. High selectivities of 7 ~ 17 for ZnO over Ni were produced in $25CF_4$/10Ar mixtures. $SnO_2$ showed much higher etch rates than Ni and a maximum selectivity of 67 was observed for $SnO_2$ over Ni.

• Transactions on Electrical and Electronic Materials
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• v.5 no.6
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• pp.215-218
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• 2004

This paper presents a three-dimensional numerical simulation for thermal oxidation process. A new elasto-viscoplastic model for robust numerical oxidation simulation is proposed. The three-dimensional effects of oxidation process such as mask lifting effect and corner effects are analyzed. In nano-scale process, the oxidant diffusion is punched through to the other side of the mask. The mask is lifted so the thickness of oxide region is greatly enhanced. The compressive pressure during the oxidation is largest in the mask corner of the island structure. This is because the masked area near the corner is surrounded by an area larger than the others in the island structure. This stress induces the retardation of the oxide growth, especially at the masked corner in the island structure.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.124-124
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• 2010

Currently, extreme ultraviolet lithography (EUVL) is being investigated for next generation lithography. EUVL is one of competitive lithographic technologies for sub-22nm fabrication of nano-scale Si devices that can possibly replace the conventional photolithography used to make today's microcircuits. Among the core EUVL technologies, mask fabrication is of considerable importance due to the use of new reflective optics having a completely different configuration compared to those of conventional photolithography. Therefore, new materials and new mask fabrication process are required for high performance EUVL mask fabrication. This study investigated the etching properties of SnO2 (Tin Oxide) as a new absorber material for EUVL binary mask. The EUVL mask structure used for etching is SnO2 (absorber layer) / Ru (capping / etch stop layer) / Mo-Si multilayer (reflective layer) / Si (substrate). Since the Ru etch stop layer should not be etched, infinitely high selectivity of SnO2 layer to Ru ESL is required. To obtain infinitely high etch selectivity and very low LER (line edge roughness) values, etch parameters of gas flow ratio, top electrode power, dc self - bias voltage (Vdc), and etch time were varied in inductively coupled Cl2/Ar plasmas. For certain process window, infinitely high etch selectivity of SnO2 to Ru ESL could be obtained by optimizing the process parameters. Etch characteristics were measured by on scanning electron microscopy (SEM) and X-ray photoelectron spectroscopy (XPS) analyses. Detailed mechanisms for ultra-high etch selectivity will be discussed.

• Proceedings of the KSME Conference
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• 2003.11a
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• pp.1921-1926
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• 2003

Nano-imprint technology has been vigorously studied by many researchers for it is one of the most promising technologies for manufacturing the pattern with its critical dimension below 100nm. In the nano-imprint technology, nano patterns are transferred on a polymer film and the transferred patterns are used as an etch mask to define the designed patterns on a substrate or a metal layer. To this end, it is important to keep the residual thickness of the imprinted polymer film uniform. In this study, a novel measurement technique to measure the residual thickness of films is proposed based on nanoindentation theory. This technique has advantages of saving time and measuring the residual thickness of highly-localized portions in comparison with other techniques, but has limitation of requiring calibration process.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.12.1-12.1
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• 2009

For the micro conductive line, memory device fabrication process use many expensive processes such as manufactur-ing of photo mask, coating of photo resist, exposure, development, and etching. However, direct printing technology has the merits about simple and cost effective processes because nano-metal particles contained inks are directly injective without mask. And also, this technology has the advantage about fabrication of fine pattern line on various substrates such as FPCB, PCB, glass, polymer and so on. In this work, we have fabricated the fine and thick metal pattern line on flexible PCB substrate for the next generation electronic circuit using Ag nano-particles contained ink. To improve the line tolerance on flexible PCB, metal lines are fabricated by sequential prinitng method. Sequential printing method has vari-ous merits about fine, thick and high resolution pattern lines without bulge.

• Journal of the Korean Society for Precision Engineering
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• v.24 no.11
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• pp.108-115
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• 2007

We have designed a high transmission C-shaped aperture using finite differential time domain (FDTD) technique. The C-shaped aperture was fabricated in the aluminum thin film on a glass substrate using a focused ion beam (FIB) milling. Nano-size patterning was demonstrated with a vacuum contact device to keep tight contact between the Al mask and the photoresist. Using 405 nm laser, we recorded a 50 nm-size dot pattern on the photoresist with the aperture and analyzed the spot size dependent on the dose illuminated on the aperture.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.2
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• pp.112-115
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• 2011

To stabilize the electric characteristic of Silicon Thin Film Transistor, reducing the current leakage is most important issue. To reduce the current leakage, many ideas were suggested. But the increase of mask layer also increased the cost. On this research Bird's Beak process was use to present element. Using Silvaco simulator, it was proven that it was able to reduce current leakage without mask layer. As a result, it was possible to suggest the structure that can reduce the current leakage to 1.39nA without having mask layer increase. Also, I was able to lead the result that electric characteristic (on/off current ratio) was improved compare from conventional structure.