• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.44.1-44.1
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• 2011

본 연구에서는 태양전지 설계를 위해 기존의 반도체소자 simulation에 사용되고 있는 Silvaco TCAD tool을 사용하여 p+ boron emitter의 특성분석 실험을 하였다. 변수로는 emitter의 농도와 접촉저항 이 두 가지 놓고 표면 재결합과 의 영향을 염두에 두고 실험을 하였다. 농도는 $1{\times}10^{17}\;cm^{-3}$에서 $2{\times}10^{22}\;cm^{-3}$까지 두었고, 각각의 농도에 해당되는 contact 저항을 설정하여 전기적 특성을 보았다. 실험 결과 두 가지 변수를 모두 입력하였을 때 처음에 Isc가 조금씩 올라가다가 $1{\times}10^8\;cm^{-3}$에서 가장 높았고 그 이후에는 표면 재결합이 커지면서 Isc가 계속 떨어졌다. 하지만 contact 저항으로 인해 가장 높은 효율은 $1{\times}10^9\;cm^{-3}$ 부근에서 보였다. 농도에 따라 표면 재결합과 contact 저항이 서로 반대로 변하기 때문에 emitter를 표면 재결합이 늘어남에도 불구하고 contact 저항으로 인해 비교적 고농도로 doping 해야만 했다. 하지만 우리가 준 contact 저항은 농도에 따라 생긴 저항으로 실제 전극의 contact 저항은 훨씬 더 클 것으로 예상되고 이로 인해 더 고농도의 doping이 필요하게 된다. 그렇게 된다면 표면의 재결합으로 인한 손실은 더 크게 되어 전체적으로 효율은 떨어진다. 우리는 이 손실을 보완하고 줄이기 위해 selective emitter 개념을 넣어 이에 대한 영향은 보았다. selective를 하지 않은 $1{\times}10^{19}\;cm^{-3}$의 doping 농도의 가장 높은 효율을 보인 기존의 emitter와 전극 부분을 제외한 표면은 $1{\times}10^{18}\;cm^{-3}$으로 하고 전극 부분의 emitter는 $2{\times}10^{20}\;cm^{-3}$으로 한 selective emitter를 비교해보았다. 이는 selective emitter가 기존 emitter에 비해 Isc와 Fill Factor로 인해 효율이 약 0.7% 정도 높았다.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.60.2-60.2
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• 2011

본 연구에서는 Indium-free 및 gallium-free 기반의 산화물 TFT를 제작하기 위해 n-type $TiO_2$ 반도체 기반의 thin film transistor ($Mo/TiO_{2-x}/SiO_2/p+\;+Si$)를 oxygen deficient black $TiO_{2-x}$ 타겟을 이용하여 DC magnetron sputtering 공법으로 제작하고 그 특성을 분석하였다. DC magnetron sputtering 공법으로 성막된 $TiO_{2-x}$ semiconductor의 전기적, 광학적, 화학적 결합 에너지 및 구조적 특성 분석을 위해 semiconductor parameter analyzer (Aglient 4156-C), UV/Vis spectrometer, X-ray Photoelectron Spectroscopy, Transmission Electron Microscopy를 각각 이용하여 분석하였으며 이를 RTA 전/후 특성 비교를 통하여 관찰하였다. $TiO_{2-x}$ TFT의 소자 특성은 RTA 열처리 전/후 전형적인 insulator 특성에서 semiconductor 특성으로 변화되는 것을 관찰할 수 있었으며, 최적화된 열처리 공정에서 filed effect mobility 0.69 $cm^2$/Vs, on to off current ratio $2.04{\times}10^7$, sub-threshold swing 2.45 V/decade와 Vth 10.45 V를 확보할 수 있었다. 또한 RTA 열처리 후 밴드갭이 3.25에서 3.41로 확장되는 특성을 나타내었다. 특히 RTA 열처리 후 stoichiometric $TiO_2$ 상태와는 다른 $Ti^{2+}$, $Ti^{3+}$, $Ti^{4+}$ 등의 다양한 oxidation states가 관찰되었으며 이러한 oxidation states를 $TiO_{2-x}$ 박막에서의 oxygen deficient 상태와 연관시킴으로써 oxygen vacancy의 n-type dopant로의 거동을 확인하였다. $TiO_2$ 채널 기반의 TFT 특성을 통하여서 indium free 또는 gallium free 산화물 채널로써의 가능성을 확인하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.166-166
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• 2010

Recently, TFTs based on amorphous oxide semiconductors (AOSs) such as ZnO, InZnO, ZnSnO, GaZnO, TiOx, InGaZnO(IGZO), SnGaZnO, etc. have been attracting a grate deal of attention as potential alternatives to existing TFT technology to meet emerging technological demands where Si-based or organic electronics cannot provide a solution. Since, in 2003, Masuda et al. and Nomura et al. have reported on transparent TFTs using ZnO and IGZO as active layers, respectively, much efforts have been devoted to develop oxide TFTs using aforementioned amorphous oxide semiconductors as their active layers. In this thesis, I report on the performance of thin-film transistors using amorphous indium gallium zinc oxides for an active channel layer at room temperature. $SiO_2$ was employed as the gate dielectric oxide. The amorphous indium gallium zinc oxides were deposited by RF magnetron sputtering. The carrier concentration of amorphous indium gallium zinc oxide was controlled by oxygen pressure in the sputtering ambient. Devices are realized that display a threshold voltage of 1.5V and an on/off ration of > $10^9$ operated as an n-type enhancement mode with saturation mobility with $9.06\;cm^2/V{\cdot}s$. The devices show optical transmittance above 80% in the visible range. In conclusion, the fabrication and characterization of thin-film transistors using amorphous indium gallium zinc oxides for an active channel layer were reported. The operation of the devices was an n-type enhancement mode with good saturation characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.196-196
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• 2008

We have investigated that the effect of post annealing on the structural and electrical properties of $Ba_{0.5}Sr_{0.5}TiO_3$ thin films. The BST thin films were deposited on n-type 4H-silicon carbide(SiC) using pulsed laser deposition (PLD). The deposition was carried out in oxygen ambient 100mTorr for 5 minutes, which results in about 300nm-thick BST films. For the BST/4H-SiC, 200nm thick silver was deposited on the BST films bye-beam evaporation. The X-ray diffraction patterns of the BST films revealed that the crystalline structure of BST thin films has been improved after post-annealing at $850^{\circ}C$ for 1 hour. The root mean square (RMS) surface roughness of the BST film measured by using a AFM was increased after post-annealing from 5.69nm to 11.49nm. The electrical properties of BST thin film were investigated by measuring the capacitance-voltage characteristics of a silver/BST/4H-SiC structure. After the post-annealing, dielectric constant of the film was increased from 159.67 to 355.33, which can be ascribed to the enhancement of the crystallinity of BST thin films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.174-174
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• 2008

Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

• Journal of the Semiconductor & Display Technology
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• v.18 no.1
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• pp.32-37
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• 2019

Titanium dioxide ($TiO_2$) is a promising dielectric material in the semiconductor industry for its high dielectric constant. However, for utilization on Si substrate, $TiO_2$ film meets with a difficulty due to the large leakage currents caused by its small conduction band energy offset from Si substrate. In this study, we propose an in-situ plasma oxidation process in plasma-enhanced atomic layer deposition (PE-ALD) system to form an oxide barrier layer which can reduce the leakage currents from Si substrate to $TiO_2$ film. $TiO_2$ film depositions were followed by the plasma oxidation process using tetrakis(dimethylamino)titanium (TDMAT) as a Ti precursor. In our result, $SiO_2$ layer was successfully introduced by the plasma oxidation process and was used as a barrier layer between the Si substrate and $TiO_2$ film. Metal-oxide-semiconductor ($TiN/TiO_2/P-type$ Si substrate) capacitor with plasma oxidation barrier layer showed improved C-V and I-V characteristics compared to that without the plasma oxidation barrier layer.

• Korean Journal of Materials Research
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• v.5 no.1
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• pp.42-54
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• 1995

$Ta_2O_5$ thin film IS a promising material for the high dielectrics of ULSI DRAM. In this study, $Ta_2O_5$ thin film was grown on p-type( 100) Si wafer by thermal metal organic chemical vapo deposition ( MCCVD) method and the effect of operating varialbles including substrate temperature( $T_s$), bubbler temperature( $T_ \sigma$), reactor pressure( P ) was investigated in detail. $Ta_2O_5$ thin film were analyzed by SEM, XRD, XPS, FT-IR, AES, TEM and AFM. In addition, the effect of various anneal methods was examined and compared. Anneal methods were furnace annealing( FA) and rapid thermal annealing( RTA) in $N_{2}$ or $O_{2}$ ambients. Growth rate was evidently classified into two different regimes. : (1) surface reaction rate-limited reglme in the range of $T_s$=300 ~ $400 ^{\circ}C$ and (2: mass transport-limited regime in the range of $T_s$=400 ~ $450^{\circ}C$.It was found that the effective activation energies were 18.46kcal/mol and 1.9kcal/mol, respectively. As the bubbler temperature increases, the growth rate became maximum at $T_ \sigma$=$140^{\circ}C$. With increasing pressure, the growth rate became maximum at P=3torr but the refractive index which is close to the bulk value of 2.1 was obtained in the range of 0.1 ~ 1 torr. Good step coverage of 85. 71% was obtained at $T_s$=$400 ^{\circ}C$ and sticking coefficient was 0.06 by comparison with Monte Carlo simulation result. From the results of AES, FT-IR and E M , the degree of SiO, formation at the interface between Si and TazO, was larger in the order of FA-$O_{2}$ > RTA-$O_{2}$, FA-$N_{2}$ > RTA-$N_{2}$. However, the $N_{2}$ ambient annealing resulted in more severe Weficiency in the $Ta_2O_5$ thin film than the TEX>$O_{2}$ ambient.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.308-309
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• 2016

Reducing surface recombination is a critical factor for high efficiency silicon solar cells. The passivation process is for reducing dangling bonds which are carrier. Tunnel oxide layer is one of main issues to achieve a good passivation between silicon wafer and emitter layer. Many research use wet-chemical oxidation or thermally grown which the highest conversion efficiencies have been reported so far. In this study, we deposit ultra-thin tunnel oxide layer by PECVD (Plasma Enhanced Chemical Vapor Deposition) using $N_2O$ plasma. Both side deposit tunnel oxide layer in different RF-power and phosphorus doped a-Si:H layer. After deposit, samples are annealed at $850^{\circ}C$ for 1 hour in $N_2$ gas atmosphere. After annealing, samples are measured lifetime and implied Voc (iVoc) by QSSPC (Quasi-Steady-State Photo Conductance). After measure, samples are annealed at $400^{\circ}C$ for 30 minute in $Ar/H_2$ gas atmosphere and then measure again lifetime and implied VOC. The lifetime is increase after all process also implied VOC. The highest results are lifetime $762{\mu}s$, implied Voc 733 mV at RF-power 200 W. The results of C-V measurement shows that Dit is increase when RF-power increase. Using this optimized tunnel oxide layer is attributed to increase iVoc. As a consequence, the cell efficiency is increased such as tunnel mechanism based solar cell application.

• KSTLE International Journal
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• v.6 no.1
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• pp.13-16
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• 2005

Friction characteristics at nano-scale of self-assembled monolayers (SAMs) having different chain lengths and end groups were experimentally studied.51 order to understand the effect of the chain length and end group on the nano-scalefriction: (1) two different SAMs of shorter chain lengths with different end groups such as methyl and phenyl groups, and (2)four different kinds of SAMs having long chain lengths (C10) with end groups of fluorine and hydrogen were coated on siliconwafer (100) by dipping method and Chemical Vapour Deposition (CVD) technique. Their nano-scale friction was measuredusing an Atomic Force Microscopy (AFM) in the range of 0-40 nN normal loads. Measurements were conducted at the scanning speed of 2 $mu$m/s for the scan size of 1$mu$m x 1 $mu$m using a contact mode type $Si_3N_4$ tip (NPS 20) that had a nominal spring constant0.58 N/m. All experiments were conducted at anlbient temperature (24 $pm$1$circ$C) and relative humidity (45 $pm$ 5%). Results showedthat the friction force increased with applied normal load for all samples, and that the silicon wafer exhibited highest frictionwhen compared to SAMs. While friction was affected by the inherent adhesion in silicon wafer, it was influenced by the chainlength and end group in the SAMs. It was observed that the nano-friction decreased with the chain length in SAMs. In the caseof monolayers with shorter length, the one with the phenyl group exhibited higher friction owing to the presence of benBenerings that are stiffer in nature. In the case of SAMs with longer chain length, those with fluorine showed friction values relativelyhigher than those of hydrogen. The increase in friction due to the presence of fluorine group has been discussed with respect tothe siBe of the fluorine atom.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.2
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• pp.155-160
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• 2020

Ga₂O₃/n-type 4H-SiC heterojunction diodes were fabricated by RF magnetron sputtering. The optical properties of Ga₂O₃ and electrical properties of diodes were investigated. I-V characteristics were compared with simulation data from the Atlas software. The band gap of Ga₂O₃ was changed from 5.01 eV to 4.88 eV through oxygen annealing. The doping concentration of Ga₂O₃ was extracted from C-V characteristics. The annealed oxygen exhibited twice higher doping concentration. The annealed diodes showed improved turn-on voltage (0.99 V) and lower leakage current (3 pA). Furthermore, the oxygen-annealed diodes exhibited a temperature cross-point when temperature increased, and its ideality factor was lower than that of as-grown diodes.