• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.448-451
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• 2000

This paper proposed a snubber circuit for flying capacitor multilevel inverter and converter. The proposed snubber circuit makes use of Undeland snubber as basic snubber as basic snubber unit and has such an advantage of Undeland snubber used in the two-level inverter. Comparing conventional RCD/RLD snubber for multilevel in verter and converter the proposed snubber keeps such a good features as fewer number of components improved efficiency of system due to low loss snubber and reduction of voltage stress of main switching devices due to low overvoltage. Furthermore the proposed concept of constructing a snubber circuit for flying capacitor 3-level inverter and converter can apply to any level of them. In this paper the proposed snubber applies to three-level flying capacitor inverter and demonstrates its feature by computer simulation and experimental result.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.625-629
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• 2004

This paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using a proposed named multi-modulating pattern method. This method is based on the vector correlation between CPWM and the space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. A CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of the corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain the full vector redundancy control, and fully utilize phase redundancy in a cascade inverter In this continued part, it will be deduced correlation between CPWM equations in multi-carrier system and single carrier system, present the mathematical model of voltage source inverter related to the common mode voltage and propose a general algorithm for multi-modulating modulator. The obtained theory will be demonstrated by simulation results.

• Proceedings of the KIPE Conference
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• 2003.07b
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• pp.621-624
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• 2003

In this paper, a novel multilevel inverter using DC-Link voltage combination is presented to reduce the harmonics of output voltage without the output filter inductor. The proposed multilevel inverter can generate 27-level output voltage. It employs three H-bridge cells which consist of single phase full-bridge inverter module. As well as, it can make continuous output voltage level employing the properly three DC-Link voltage ratio. The validity of the proposed inverter is verified through the experimental result using a prototype which can generate a 110[Vac], 60[Hz] output voltage from 12[Vdc], 36[vdc], and 108[Vdc] input voltages

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.53 no.7
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• pp.452-461
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• 2004

A novel multilevel PWM inverter is presented for the use of stand-alone photovoltaic power generation system. In appearance, it consists of three full-bridge modules and three cascaded transformers; therefore, the configuration of the proposed multilevel PW inverter is equal to that of a prior 11-level PWM inverter. Only the turn-ratio of a transformer and its corresponding switching function are different from each other. Owing to these differences, the proposed 19-level PWM inverter has two promising advantages. First, output voltage levels increase almost twofold. Consequently, it can generate more sinusoidal output voltage waveform. Second, due to a revised switching pattern, it lightens power imposed on the transformer, which is used for compensating output voltages with chopped pulses between steps. The validity of the proposed inverter system is verified by computer-aided simulations and experimental results based on a 1 ［kW］ prototype. The performance of the proposed 19-level PWM inverter is compared with the Prior 11-level PWM inverter and other counterparts.

• Journal of Electrical Engineering and Technology
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• v.5 no.4
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• pp.545-551
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• 2010

A new family of DC to AC converters, referred to as multilevel inverter, has received much attention from industries and researchers for its high power and voltage applications. One of the conventional techniques for implementing the switching algorithm in these inverters is optimized harmonic stepped waveform (OHSW). However, the major problem in using this technique is eliminating low order harmonics by solving the nonlinear and complex equations. In this paper, a new approach called the "bacterial foraging algorithm" (BFA) is employed. This algorithm eliminates and optimizes the harmonics in a multilevel inverter. This method has higher speed, precision, and convergence power compared with the genetic algorithm (GA), a famous evolutionary algorithm. The proposed technique can be expanded in any number of levels. The purpose of optimization is to remove some low order harmonics, as well as to ensure the fundamental harmonic retained at the desired value. As a case study, a 13-level inverter is chosen. The comparison results by MATLAB software between the two optimization methods (BFA and GA) have shown the effectiveness and superiority of BFA over GA where convergence is desired to achieve global optimum.

• Journal of Electrical Engineering and Technology
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• v.13 no.2
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• pp.711-721
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• 2018

This paper presents a single-phase asymmetric half-bridge cascaded multilevel inverter based series active power filter (SAPF) for harmonic voltage compensation. The effect of level number on performance of the proposed SAPF is examined in terms of total harmonic distortion (THD) and system efficiency. Besides, the relationship between the level number and the number of switching device are compared with the other multilevel inverter topologies used in APF applications. The paper is also aimed to demonstrate the capability of the SAPF for compensating harmonic voltages alone, without using a passive power filter (PPF). To obtain the required output voltage, a new switching algorithm is developed. The proposed SAPF with levels of 7, 15 and 31 is used in both simulation and experimental studies and the harmonic voltages of the load connected to the point of common coupling (PCC) is compensated under two different loading conditions. Furthermore, very high system efficiency values such as 98.74% and 96.84% are measured in the experimental studies and all THD values are brought into compliance with the IEEE-519 Standard. As a result, by increasing the level number of the inverter, lower THD values can be obtained even under high harmonic distortion levels while system efficiency almost remains the same.

• Journal of Power Electronics
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• v.17 no.1
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• pp.115-126
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• 2017

This paper presents a new cascaded asymmetrical single phase multilevel converter with a reduced number of isolated DC sources and power semiconductor switches. The proposed inverter has only two H-bridges connected in cascade, one switching at a high frequency and the other switching at a low frequency. The Low Switching Frequency Inverter (LSFI) generates seven levels whereas the High Switching Frequency Inverter (HSFI) generates only two levels. This paper also presents a solution to the capacitor balancing issues of the LSFI. The proposed inverter has lot of advantages such as reductions in the number of DC sources, switching losses, power electronic devices, size and cost. The proposed inverter with a capacitor voltage balancing algorithm is simulated using MATLAB/SIMULINK. The switching logic of the proposed inverter with a capacitor voltage balancing algorithm is developed using a FPGA SPATRAN 3A DSP board. A laboratory prototype is built to validate the simulation results.

• Journal of Electrical Engineering and Technology
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• v.12 no.6
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• pp.2278-2288
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• 2017

Multilevel converter topologies are widely used in many applications. The cascaded H-bridge multilevel inverter (CHBMI), which is one of many multilevel converter topologies, has been introduced as a useful topology in high and medium power. However, it has a drawback to require a lot of switches. Therefore, the reliability of CHBMI is important factor for analyzing the performance. This paper presents a simple switch fault diagnosis method for single-phase CHBMI. There are two types of switch faults: open-fault and short-fault. In the open-fault, the body diode of faulty switch provides a freewheeling current path. However, when the short-fault occurs, the distortion of output current is different from that of the open-fault because it has an unavailable freewheeling current flow path due to a disconnection of fuse. The fault diagnosis method is based on the zero current time analysis according to zero-voltage switching states. Using the proposed method, it is possible to detect the location of faulty switch accurately. The PSIM simulation and experimental results show the effectiveness of proposed switch fault diagnosis method.

• Proceedings of the KSR Conference
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• 2011.05a
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• pp.1473-1479
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• 2011

In this paper, speed control of IPMSM drives for the next generation domestic high speed railway system using multilevel inverter is presented. Multilevel inverter is suitable for the high-voltage high-capacity motor drive system because noise and switching frequency of power semiconductor devices is reduced. For the speed control of IPMSM using multilevel inverter, maximum torque control is applied in a constant torque region, and field weakening control is applied in a constant power region. Simulation programs based on Matlab/Simulink are developed. Finally the designed system is verified by simulation and their characteristics are analyzed by the simulation results.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.1-4
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• 2003

This paper proposes a method of voltage control for three-phase multilevel H-bridge inverters with selective harmonic elimination (SHE) PWM The full-bridge configuration of H-bridge inverter cells enables voltage control with a fixed PWM pattern by means of phase shifting between the legs, which greatly simplifies the control while maintaining the harmonic elimination characteristics. The series combination of the cells in multilevel configuration can be exploited to further improve the hormonic elimination characteristics with proper phase shifting between the ceil volitage. A complexor-based control method is introduced to control the magnitude and phase angle of cell voltages that form three-phase multilevel output voltages. Simulation results show that the proposed method along with SHE PWM would provide satisfactory performance in spite of its simplicity.