• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 2001년도 춘계학술대회 논문집(한국공작기계학회)
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• pp.275-280
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• 2001

Recently, the trends of industrial products grow more miniaturization, variety and mass production. Micro drilling which take high precision in cutting work is requested more micro hole and high speed working. Especially, Micro deep hole drilling is becoming more important in a wide spectrum of precision production industries, ranging from the production of automotive fuel injection nozzle, watch and camera parts, medical needles, and thick multi-layered Printed Circuit Boards(PCB) that are demanded for very high density electric circuitry. This paper shows the tool monitoring results of micro drill with tool dynamometer. And additionally, microscope with built-in monitor inspection show the relationship between burr in workpiece and chip form of micro drill machining.

• 소성∙가공
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• 제13권1호
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• pp.65-71
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• 2004

Recent electronic equipment becomes smaller, more functional, and more complex. According to these trends, LTCC(low temperature co-fired ceramic) has been emerged as a promising technology in packaging industry. It consists of multi-layer ceramic sheet, and the circuit has 3D structure. In this technology via hole formation plays an important role because it provides an electric path for the packaging interconnection network. Therefore via hole qualify is very important for ensuring performance of LTCC product. Via holes are formed on the green sheet that consists of ceramic(before sintering) layer and PET(polyethylene terephthalate) one. In this paper we found the correlation between hole quality and process condition such as PET thickness and ceramic thickness. The shear behavior of double layer sheet by micro hole punching which is different from that of single layer one was also discussed.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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• pp.256-259
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• 2003

In this paper, a design of multi-layered BPF(bandpass filter) using LTCC(Low Temperature Co-fired Ceramic) process by a lumped-elements is proposed for SOP(system-on-a-chip) of wireless communication systems. The proposed BPF improved a characteristic of rejection band to build an attenuation pole caused by structurally adjacent co-inductance and coupling. The simulation data shows a bandwidth of 90MHz from a center frequency of 2.4GHz, a return loss of 27dB, an insertion loss of 3.2dB, and an attenuation of at least 20dBc at $f_0{\pm}250MHz$. Simulations have used serenade circuit simulation and HFSS EM simulation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 제38회 하계학술대회
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• pp.1504-1505
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• 2007

In this paper, fully embedded high Dk BTO MIM capacitors have been developed into a multi-layered organic package substrate for low cost RF SOP (System on Package) applications. These embedded MIM capacitors were designed and simulated by using CST 3D EM simulators for finding out optimal geometries and verifying their applicability. The embedded MIM capacitor with a size of $550\;{\times}\;550\;um^2$ has a capacitance of 5.3pF and quality factor of 43 at 1.5 GHz, respectively. The measured performance characteristics were well matched with 3D EM simulated ones. Equivalent circuit parameters of the embedded capacitors were extracted for making a design library.

• 한국음향학회지
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• 제14권4호
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• pp.29-37
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• 1995

높은 결합계수를 가진 압전진동자의 전기단자에 전기적 임피던스를 결합하면 공진주파수가 크게 변화한다. 본 연구에서는 이 현상의 해석을 위하여 전기단자의 부하상태를 고려한 새로운 전송선로형 등가회로를 제안하고, 그 등가회로의 유효성을 실험적으로 확인하였다. 실험에 있어서는 2층구조의 주파수 가변형 PZT 트랜스듀서를 제작, 그 전기단자에 접속시킨 임피던스의 변화에 따른 공진주파수의 변화와 실효감쇠량을 측정하였다. 제작된 트랜스듀서의 공진주파수는 180 KHz~580KHz의 넓은 주파수 대역에서 연속적으로 변화하고, 330KHz~470KHz에서의 실효감쇠량은 7dB이하의 높은 효율을 나타내었는데, 이 결과는 제안한 등가회로에 의한 해석결과와 잘 일치하였다.

• 마이크로전자및패키징학회지
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• 제8권1호
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• pp.61-64
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• 2001

VCO(Voltage Controlled Oscillator)는 통신용 단말기의 크기, 성능 및 전력 소비를 결정하는 중요한 부품중의 하나이다. 통신용 기기의 크기가 점점 작아지고 있는 추세이기 때문에 VCO도 특성의 저하없이 점점 소형화 되고 있다. VCO 모듈을 개발하기에 앞서 회로에 사용되는 수동소자(L,C,R)들에 대한 연구가 진행되었다. 이 과정에서 작은 면적을 차지하면서도 동일한 특성을 나타낼 수 있는 패턴을 고안하였고 이를 적용하였다. 자체 개발된 수동소자 library를 가지고 2차원 simulation을 시행하였고 이를 바탕으로 3차원 회로를 구성하였다. 3차원 회로 구성시 VCO 전체 특성에 크게 영향을 주는 소자들은 trimming이 가능하도록 surface 쪽으로 배치하였다. 공진기 부분에서는 저손실의 stripline 구조를 적용하여 높은 Q값을 얻을 수 있었다. 이러한 과정을 통해 2.3~2.36 GHz에서 동작하는 적층형 VCO를 개발하였다.

• Macromolecular Research
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• 제14권4호
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• pp.430-437
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• 2006

The ultra-drawing process of an ultra high molecular weight polyethylene (UHMWPE) gel film was examined by incorporating linear low-density polyethylene (LLDPE) and $BaTiO_3$ nanoparticles. The effects of LLDPE and the draw ratios on the morphological development and mechanical properties of the nanocomposite membrane systems were investigated. By incorporating $BaTiO_3$ nanoparticles in the UHMWPE/LLDPE blend systems, the ultra-drawing process provided a highly extended, fibril structure of UHMWPE chains to form highly porous, composite membranes with well-dispersed nanoparticles. The ultra-drawing process of UHMWPE/LLDPE dry-gel films desirably dispersed the highly loaded $BaTiO_3$ nanoparticles in the porous membrane, which could be used to form multi-layered structures for electronic applications in various embedded, printed circuit board (PCB) systems.

• 한국전자파학회논문지
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• 제11권1호
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• pp.55-62
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• 2000

본 논문에서는 휴대전화 단말기(핸드폰) 안테나를 co-planar 급전 구조의 회로기판상에 표면장착 가능한 칩형태로 설계 하였다. 설계된 안테나는 유전체 세락믹 ($\varepsilon_{\tau}$=23)을 적층하여 직육면체 형태($7.5mm\times4.5mm\times0.4mm$)로 만들고 그 표면에 $\lambda$/4 파장 모노폴 방사소자를 헬리컬 구조로 형성시켜 제작되었다. 제특성 측정 결과 반사 손실 27.36dB,-10dB 대역폭 76MHz(3.97%), H면 평균이득-9.43dBd로 일반적인 모노폴 안테나 방사 특성을 나타내었다.

• 한국기계가공학회지
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• 제18권7호
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• pp.48-55
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• 2019

Soldiers have been exposed to the risk of chilblains in cold winters. Recent studies have described sensors and IOT devices that use independent power sources based on piezoelectric energy harvesting. Therefore, the heated shoes with an independent power source have been developed. For the application of energy harvesting to shoes, it is necessary to develop a unique harvester by considering human gait characteristics. Energy harvesters and ceramics were designed and fabricated in this study. The performances of these harvesters and ceramics were evaluated experimentally. Then, the harvesters and ceramics with superior performance were selected and applied to the system. Thereafter, the heating and charging performance of the system was tested under real walking conditions. The results show that the developed system can generate adequate energy to charge the battery and heat the shoes.

• ETRI Journal
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• 제45권5호
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• pp.910-921
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• 2023

In this study, we designed a 6T-SRAM cell using 16-nm CMOS process and analyzed the performance in terms of read-speed latency. The temperaturedependent Cu and multilayered graphene nanoribbon (MLGNR)-based nanointerconnect materials is used throughout the circuit (primarily bit/bit-bars [red lines] and word lines [write lines]). Here, the read speed analysis is performed with four different chip operating temperatures (150K, 250K, 350K, and 450K) using both Cu and graphene nanoribbon (GNR) nano-interconnects with different interconnect lengths (from 10 ㎛ to 100 ㎛), for reading-0 and reading-1 operations. To execute the reading operation, the CMOS technology, that is, the16-nm PTM-HPC model, and the16-nm interconnect technology, that is, ITRS-13, are used in this application. The complete design is simulated using TSPICE simulation tools (by Mentor Graphics). The read speed latency increases rapidly as interconnect length increases for both Cu and GNR interconnects. However, the Cu interconnect has three to six times more latency than the GNR. In addition, we observe that the reading speed latency for the GNR interconnect is ~10.29 ns for wide temperature variations (150K to 450K), whereas the reading speed latency for the Cu interconnect varies between ~32 ns and 65 ns for the same temperature ranges. The above analysis is useful for the design of next generation, high-speed memories using different nano-interconnect materials.