• Title/Summary/Keyword: multi-core systems

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Collaborative Streamlined On-Chip Software Architecture on Heterogenous Multi-Cores for Low-Power Reactive Control in Automotive Embedded Processors (차량용 임베디드 프로세서에서 저전력 반응적 제어를 위한 이기종 멀티코어 협력적 스트리밍 온-칩 소프트웨어 구조)

  • Jisu, Kwon;Daejin, Park
    • IEMEK Journal of Embedded Systems and Applications
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    • v.17 no.6
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    • pp.375-382
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    • 2022
  • This paper proposes a multi-core cooperative computing structure considering the heterogeneous features of automotive embedded on-chip software. The automotive embedded software has the heterogeneous execution flow properties for various hardware drives. Software developed with a homogeneous execution flow without considering these properties will incur inefficient overhead due to core latency and load. The proposed method was evaluated on an target board on which a automotive MCU (micro-controller unit) with built-in multi-cores was mounted. We demonstrate an overhead reduction when software including common embedded system tasks, such as ADC sampling, DSP operations, and communication interfaces, are implemented in a heterogeneous execution flow. When we used the proposed method, embedded software was able to take advantage of idle states that occur between heterogeneous tasks to make efficient use of the resources on the board. As a result of the experiments, the power consumption of the board decreased by 42.11% compared to the baseline. Furthermore, the time required to process the same amount of sampling data was reduced by 27.09%. Experimental results validate the efficiency of the proposed multi-core cooperative heterogeneous embedded software execution technique.

Multi-Secondary Transformer: A Modeling Technique for Simulation - II

  • Patel, A.;Singh, N.P.;Gupta, L.N.;Raval, B.;Oza, K.;Thakar, A.;Parmar, D.;Dhola, H.;Dave, R.;Gupta, V.;Gajjar, S.;Patel, P.J.;Baruah, U.K.
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.1
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    • pp.78-82
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    • 2014
  • Power Transformers with more than one secondary winding are not uncommon in industrial applications. But new classes of applications where very large number of independent secondaries are used are becoming popular in controlled converters for medium and high voltage applications. Cascade H-bridge medium voltage drives and Pulse Step Modulation (PSM) based high voltage power supplies are such applications. Regulated high voltage power supplies (Fig. 1) with 35-100 kV, 5-10 MW output range with very fast dynamics (${\mu}S$ order) uses such transformers. Such power supplies are widely used in fusion research. Here series connection of isolated voltage sources with conventional switching semiconductor devices is achieved by large number of separate transformers or by single unit of multi-secondary transformer. Naturally, a transformer having numbers of secondary windings (~40) on single core is the preferred solution due to space and cost considerations. For design and simulation analysis of such a power supply, the model of a multi-secondary transformer poses special problem to any circuit analysis software as many simulation softwares provide transformer models with limited number (3-6) of secondary windings. Multi-Secondary transformer models with 3 different schemes are available. A comparison of test results from a practical Multi-secondary transformer with a simulation model using magnetic component is found to describe the behavior closer to observed test results. Earlier models assumed magnetising inductance in a linear loss less core model although in actual it is saturable core made-up of CRGO steel laminations. This article discusses a more detailed representation of flux coupled magnetic model with saturable core properties to simulate actual transformers very close to its observed parameters in test and actual usage.

Acceleration of Intrusion Detection for Multi-core Video Surveillance Systems (멀티 코어 프로세서 기반의 영상 감시 시스템을 위한 침입 탐지 처리의 가속화)

  • Lee, Gil-Beom;Jung, Sang-Jin;Kim, Tae-Hwan;Lee, Myeong-Jin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.12
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    • pp.141-149
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    • 2013
  • This paper presents a high-speed intrusion detection process for multi-core video surveillance systems. The high-speed intrusion detection was designed to a parallel process. Based on the analysis of the conventional process, a parallel intrusion detection process was proposed so as to be accelerated by utilizing multiple processing cores in contemporary computing systems. The proposed process performs the intrusion detection in a per-frame parallel manner, considering the data dependency between frames. The proposed process was validated by implementing a multi-threaded intrusion detection program. For the system having eight processing cores, the detection speed of the proposed program is higher than that of the conventional one by up to 353.76% in terms of the frame rate.

A Kernel Module to Support High-Performance Intra-Node Communication for Multi-Core Systems (멀티 코어 시스템을 위한 고속 노드내 통신 지원 모듈)

  • Jin, Hyun-Wook;Kang, Hyun-Goo;Kim, Jong-Soon
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.9
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    • pp.407-415
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    • 2007
  • In parallel cluster computing systems, the efficiency of communication between computing nodes is one of important factors that decide overall system performance. Accordingly, many researchers have studied on high-performance inter-node communication. The recently launched multi-core processor, however. increases the importance of intra-node communication as well because the more the number of cores in a node, the more the number of parallel processes running in the same node. Though there have been studies on intra-node communications, these have limited considerations on the state-of-the-art systems. In this paper, we propose a Linux kernel module that minimizes the number of data copy by exploiting the memory mapping mechanism for high-performance intra-node communication. The proposed kernel module supports the Linux kernel version 2.6. The performance measurements over a multi-core system present that the proposed kernel module can achieve lower latency up to 62% and higher throughput up to 144% than an existing kernel module approach. In addition, the measurements reveal that the performance of intra-node communication can vary significantly based on whether the cores that run the communication processes are belong to the same processor package (i.e., sharing the L2 cache).

MEASURING THE CORE SHIFT EFFECT IN AGN JETS WITH THE EXTENDED KOREAN VLBI NETWORK

  • JUNG, TAEHYUN;DODSON, RICHARD;HAN, SEOG-TAE;RIOJA, MARIA J.;BYUN, DO-YOUNG;HONMA, MAREKI;STEVENS, JAMIE;VICENTE, PABLO DE;SOHN, BONG WON
    • Journal of The Korean Astronomical Society
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    • v.48 no.5
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    • pp.277-284
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    • 2015
  • We present our efforts for extending the simultaneous multi-frequency receiver system of the Korean Very Long Baseline Interferometry (VLBI) Network (KVN) to global baselines in order to measure the frequency-dependent position shifts in Active Galactic Nuclei (AGN) jets, the so called core shift effect, with an unprecedented accuracy (a few micro-arcseconds). Millimeter VLBI observations with simultaneous multi-frequency receiver systems, like those of the KVN, enable us to explore the innermost regions of AGN and high precision astrometry. Such a system is capable of locating the frequency dependent opacity changes accurately. We have conducted the feasibility test-observations with the interested partners by implementing the KVN-compatible systems. Here we describe the science case for measuring the core shift effect in the AGN jet and report progress and future plans on extending the simultaneous multi-frequency system to global baselines.

A method for Application of Hybrid Geothermal Cooling-Heating System in Multi Family Apartment (공동주택용 하이브리드 지열 냉난방 시스템의 적용추진 전략)

  • Park, Yong-Boo;Park, Jong-Bae;Kim, Gil-Tae
    • Proceedings of the Korean Geotechical Society Conference
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    • 2009.09a
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    • pp.1447-1454
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    • 2009
  • Currently, geothermal heat pump systems are being installed in new official and commercial building, welfare facilities, and school but there are a few cases for the housing heat sink in Korea. The reason is that there are no progressive taxes for the household electrical use, no actual output for the application of geothermal technology, high initial investment. For the overall use in multi family apartment such as the Green Home etc, technology development and building of the relevant research team need to be done through preliminary study. Core subjects for overall use include cooling heating load estimation for the multi family apartment, economical efficiency of the geothermal cooling and heating system, design and construction technology of the geothermal cooling and heating system for the multi family apartment, commercialization plan, and state of the art analysis. Selection of the detailed subjects with respect to core subject, driving schedule and commercialization plan, driving system, presentation of the utilization plan.

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Design Technique and Application for Distributed Recovery Block Using the Partitioning Operating System Based on Multi-Core System (멀티코어 기반 파티셔닝 운영체제를 이용한 분산 복구 블록 설계 기법 및 응용)

  • Park, Hansol
    • Journal of IKEEE
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    • v.19 no.3
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    • pp.357-365
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    • 2015
  • Recently, embedded systems such as aircraft and automobilie, are developed as modular architecture instead of federated architecture because of SWaP(Size, Weight and Power) issues. In addition, partition operating system that support multiple logical node based on partition concept were recently appeared. Distributed recovery block is fault tolerance design scheme that applicable to mission critical real-time system to support real-time take over via real-time synchronization between participated nodes. Because of real-time synchronization, single-core based computer is not suitable for partition based distributed recovery block design scheme. Multi-core and AMP(Asymmetric Multi-Processing) based partition architecture is required to apply distributed recovery block design scheme. In this paper, we proposed design scheme of distributed recovery block on the multi-core based supervised-AMP architecture partition operating system. This paper implements flight control simulator for avionics to check feasibility of our design scheme.

Adaptive Writeback-aware Cache Management Policy for Lifetime Extension of Non-volatile Memory

  • Hwang, Sang-Ho;Choi, Ju Hee;Kwak, Jong Wook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.4
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    • pp.514-523
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    • 2017
  • In this paper, we propose Adaptive Writeback-aware Cache management (AWC) to prolong the lifetime of non-volatile main memory systems by reducing the number of writebacks. The last-level cache in AWC is partitioned into Least Recently Used (LRU) segment and LRU using Dirty block Precedence (DP-LRU) segment. The DP-LRU segment evicts clean blocks first for giving reuse opportunity to dirty blocks. AWC can also determine the efficient size of DP-LRU segment for reducing the number of writebacks according to memory access patterns of programs. In the performance evaluation, we showed that AWC reduced the number of writebacks up to 29% and 46%, and saved the energy of a main memory system up to 23% and 49% in a single-core and multi-core, respectively. AWC also reduced the runtime by 1.5% and 3.2% on average compared to previous cache managements for non-volatile main memory systems, in a single-core and a multi-core, respectively.

SVM-based Energy-Efficient scheduling on Heterogeneous Multi-Core Mobile Devices (비대칭 멀티코어 모바일 단말에서 SVM 기반 저전력 스케줄링 기법)

  • Min-Ho, Han;Young-Bae, Ko;Sung-Hwa, Lim
    • Journal of Korea Society of Industrial Information Systems
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    • v.27 no.6
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    • pp.69-75
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    • 2022
  • We propose energy-efficient scheduling considering real-time constraints and energy efficiency in smart mobile with heterogeneous multi-core structure. Recently, high-performance applications such as VR, AR, and 3D game require real-time and high-level processings. The big.LITTLE architecture is applied to smart mobiles devices for high performance and high energy efficiency. However, there is a problem that the energy saving effect is reduced because LITTLE cores are not properly utilized. This paper proposes a heterogeneous multi-core assignment technique that improves real-time performance and high energy efficiency with big.LITTLE architecture. Our proposed method optimizes the energy consumption and the execution time by predicting the actual task execution time using SVM (Support Vector Machine). Experiments on an off-the-shelf smartphone show that the proposed method reduces energy consumption while ensuring the similar execution time to legacy schemes.

A Study on RF Calibration Method of Next Generation Mobile Communication System (차세대 이동통신 시스템의 RF Calibration 기법에 관한연구)

  • Kim, Wan-Tae;Cho, Sung-Joon
    • Journal of Advanced Navigation Technology
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    • v.14 no.6
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    • pp.859-864
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    • 2010
  • In the next generation system, a study on realization of Multi-Core system is in progress for applying it in multi service network. Therefore some mobile systems are expected to be appeared. These systems can support WiBro, WCDMA, CDMA, etc with single terminal. These systems have to support various FA using broadband frequency and hand over to other service network. Especially, in the telecommunication system composed of cell, the transmit power can be interference at adjacent system, has effect on system channel capacity and cell size. In this paper, we improve the unstable transmit power caused by unsettled system operation, propose the RF(Radio Frequency) Calibration method which can use the transmit power stably even during hand over between heterogeneous networks causing unstable power change. Also we used proposed method and analysed used electricity of system during hand over between heterogeneous networks.