• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.9C
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• pp.1219-1226
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• 2004

The objective of this paper is to proposed a new Hybrid Interference Cancellation(HlC) receiver to cancel MAI in a multirate DS-CDMA system based on multiple processing gain(MPG). We propose a new improved HIC scheme that divides the active users with different data rates split into a number of groups for effectives cancellation Between each group, GW-PIC is performed to cancel other group signals and within them, SIC is carried out to remove multiple access interference in group. We analyze the performance of the proposed receiver in terms of the bit error rate(BER) and examine its performance. As a conclusion, computer simulations show that the proposed schemes outperforms adaptive multistage PIC and conventional SIC receiver over AWGN channel.

• Journal of Information Processing Systems
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• v.14 no.3
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• pp.666-679
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• 2018

The discrete wavelet transform (DWT) has good multi-resolution decomposition characteristic and its low frequency component contains the basic information of an image. Based on this, a fragile watermarking using the local binary pattern (LBP) and DWT is proposed for image authentication. In this method, the LBP pattern of low frequency wavelet coefficients is adopted as a feature watermark, and it is inserted into the least significant bit (LSB) of the maximum pixel value in each block of host image. To guarantee the safety of the proposed algorithm, the logistic map is applied to encrypt the watermark. In addition, the locations of the maximum pixel values are stored in advance, which will be used to extract watermark on the receiving side. Due to the use of DWT, the watermarked image generated by the proposed scheme has high visual quality. Compared with other state-of-the-art watermarking methods, experimental results manifest that the proposed algorithm not only has lower watermark payloads, but also achieves good performance in tamper identification and localization for various attacks.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.9
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• pp.12-17
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• 2016

In the holographic data storage system (HDSS), the data regarding the volume of a storage medium are recorded and read by the page, and the transmission rate and storage capacity can be increased because of two-dimensional, page-oriented data processing; furthermore, the multi-level HDSS can store more than one bit per pixel. For this same reason, however, and unlike conventional data-storage systems, the HDSS is hampered by two-dimensional (2D) intersymbol interference (ISI) and interpage interference (IPI). Progress regarding the published papers on 2D ISI, which is more severe in the multi-level HDSS, continues; however, mitigation of both 2D ISI and IPI in terms of the multi-level HDSS has not yet been studied. In this paper, we therefore propose a 4-level balanced-modulation code that simultaneously mitigates 2D ISI and IPI.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.29 no.5
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• pp.997-1006
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• 2019

To overcome the difficulties and inefficiencies of the existing power analysis attack, we try to extract the secret key embedded in a cryptographic device using attack model based on MLP(Multi-Layer Perceptron) method. The target of our proposed power analysis attack is the AES-128 encryption module implemented on an 8-bit processor XMEGA128. We use the divide-and-conquer method in bytes to recover the whole 16 bytes secret key. As a result, the MLP-based power analysis attack can extract the secret key with the accuracy of 89.51%. Additionally, this MLP model has the 94.51% accuracy when the pre-processing method on power traces is applied. Compared to the machine leaning-based model SVM(Support Vector Machine), we show that the MLP can be a outstanding method in power analysis attacks due to excellent ability for feature extraction.

• The Journal of the Acoustical Society of Korea
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• v.28 no.1
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• pp.1-9
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• 2009

This paper deals with the realization of multi-channel live karaoke. In this study, 6-channel MP3 decoding and tempo/key scaling was operated in real time by using the TMS320C6713 DSP, which is 32 bit floating-point DSP made by TI Co. The 6 channel consists of front L/R instrument, rear L/R instrument, melody, and woofer. In case of the 4 channel, rear L/R instrument can be replaced with drum L/R channel. And the final output data is generated as adjusted to a 5.1 channel speaker. The SOLA algorithm was applied for tempo scaling, and key scaling was done with interpolation and decimation in the time domain. Drum channel was excluded in key scaling by separating instruments into drums and non-drums, and in processing SOLA, high-quality tempo scaling was made possible by differentiating SOLA frame size, which was optimized for real-time process. The use of 6 channels allows the composition of various channels, and the multi-channel audio system of this study can be effectively applied at any place where live music is needed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.12
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• pp.3235-3245
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• 1996

A DDFS(Direct Digital Frequency Synthesizer) used in spread spectrum communication systems must need fast switching speed, high resolution(the step size of the synthesizer), small size and low power. The chip has been designed with four parallel sine look-up table to achieve four times throughput of a single DDFS. To achieve a high processing speed DDFS chip, a 24-bit pipelined CMOS technique has been applied to the phase accumulator design. To reduce the size of the ROM, each sine ROM of the DDFS is stored 0-.pi./2 sine wave data by taking advantage of the fact that only one quadrant of the sine needs to be stored, since the sine the sine has symmetric property. And the 8 bit of phase accumulator's output are used as ROM addresses, and the 2 MSBs control the quadrants to synthesis the sine wave. To compensate the spectrum purity ty phase truncation, the DDFS use a noise shaper that structure like a phase accumlator. The system input clock is divided clock, 1/2*clock, and 1/4*clock. and the system use a low frequency(1/4*clock) except MUX block, so reduce the power consumption. A 107MHz DDFS(Direct Digital Frequency Synthesizer) implemented using 0.8.mu.m CMOS gate array technologies is presented. The synthesizer covers a bandwidth from DC to 26.5MHz in steps of 1.48Hz with a switching speed of 0.5.mu.s and a turing latency of 55 clock cycles. The DDFS synthesizes 10 bit sine waveforms with a spectral purity of -65dBc. Power consumption is 276.5mW at 40MHz and 5V.

• Journal of the Korea Society of Computer and Information
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• v.16 no.10
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• pp.11-21
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• 2011

This paper introduces an SIMD(Single Instruction Multiple Data) based parallel processor that efficiently processes massive data inherent in multimedia. In addition, this paper implements MMX(MultiMedia eXtension)-type instructions on the data parallel processor and evaluates and analyzes the performance of the MMX-type instructions. The reference data parallel processor consists of 16 processors each of which has a 32-bit datapath. Experimental results for a JPEG compression application with a 1280x1024 pixel image indicate that MMX-type instructions achieves a 50% performance improvement over the baseline instructions on the same data parallel architecture. In addition, MMX-type instructions achieves 100% and 51% improvements over the baseline instructions in energy efficiency and area efficiency, respectively. These results demonstrate that multimedia specific instructions including MMX-type have potentials for widely used many-core GPU(Graphics Processing Unit) and any types of parallel processors.

• Journal of the Institute of Convergence Signal Processing
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• v.20 no.4
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• pp.205-211
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• 2019

Steganalysis is a technique that aims to detect and recover data hidden by steganography. Steganalytic methods detect hidden data by analyzing visual and statistical distortions caused during data embedding. However, for recovering the hidden data, they need to know which steganographic methods the hidden data has been embedded by. Therefore, we propose a hierarchical convolutional neural network (CNN) structure that identifies a steganographic method applied to an input image through multi-level classification. We trained four base CNNs (each is a binary classifier that determines whether or not a steganographic method has been applied to an input image or which of two different steganographic methods has been applied to an input image) and connected them hierarchically. Experimental results demonstrate that the proposed hierarchical CNN structure can identify four different steganographic methods (LSB, PVD, WOW, and UNIWARD) with an accuracy of 79%.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.12
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• pp.10-19
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• 2001

In this paper, we propose an effective but simple multi-rate parallel interference canceller(PIC) for the international mobile telecommunications-2000(IMT-2000) 3rd generation partnership project (3GPP) system. For effective multi-rate processing, we define the basic block as one symbol period of the dedicated physical control channel(DPCCH) having the lowest data rate and common to all users. Then, decision and interference cancellation are performed at every basic block. For an asynchronous channel, we propose an advance removal scheme that removes in advance multiple access interference(MAI) due to the next blockof other users with shorter delay. Introducing a pipeline structure at a sample base, we can implement efficiently the PIC using the advance removal scheme with a minimum hardware and no extra computations. Through computer simulations, we analyze the bit error rate(BER) performance of the proposed PIC with respect to signal-to-noise ratio(SNR) and the number of users.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.68-76
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• 2010

Touch-enabled technology is increasingly being accepted as a main communication interface between human and computers. However, conventional touchscreen technologies, such as resistive overlay, capacitive overlay, and SAW(Surface Acoustic Wave), are not cost-effective for large screens. As an alternative to the conventional methods, we introduce a newly emerging method, an optical imaging touchscreen which is much simpler and more cost-effective. Despite its attractive benefits, optical imaging touchscreen has to overcome some problems, such as heavy computational complexity, intermittent ghost points, and over-sensitivity, to be commercially used. Therefore, we designed a hardware controller for signal processing and multi-coordinate computation, and proposed Infrared-blocked DA(Dark Area) manipulation as a solution. While the entire optical touch control took 34ms with a 32-bit microprocessor, the designed hardware controller can manage 2 valid coordinates at 200fps and also reduce energy consumption of infrared diodes from 1.8Wh to 0.0072Wh.