• Proceedings of the IEEK Conference
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• 2000.09a
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• pp.857-860
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• 2000

In this letter, The proposed algorithm has processed the motion estimation and compensation only in the region which has the motion. By considering the temporal redundancies between the successive frames, the bit cost for representing the motion are reduced efficiently. The performance of them proposed technique show the superior result to the existing methods' in terms of both PSNR and coding cost.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.10C
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• pp.1000-1010
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• 2006

This paper proposes a new architecture for DCT-based motion estimation and compensation. Previous methods do riot take sufficient advantage of the sparseness of 2-D DCT coefficients to reduce execution time. We first derive a recursion equation to perform DCT domain motion estimation more efficiently; we then use it to develop a wavefront array processor (WAP) consisting of processing elements. In addition, we show that the recursion equation enables motion predicted images with different frequency bands, for example, from the images with low frequency components to the images with low and high frequency components. The wavefront way Processor can reconfigure to different motion estimation algorithms, such as logarithmic search and three step search, without architectural modifications. These properties can be effectively used to reduce the energy required for video encoding and decoding. The proposed WAP architecture achieves a significant reduction in computational complexity and processing time. It is also shown that the motion estimation algorithm in the transform domain using SAD (Sum of Absolute Differences) matching criterion maximizes PSNR and the compression ratio for the practical video coding applications when compared to tile motion estimation algorithm in the spatial domain using either SAD or SSD.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.9
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• pp.1605-1614
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• 2008

This paper proposed a new VLSI architecture of motion estimation (ME) and compensation (MC) for efficient video compression and implemented it to hardware. ME is generally calculated using SAD result. So we proposed a new arithmetic method for SAD. The proposed SAD calculation method increases arithmetic efficiency and decreases external memory usage. Finally it increases performance of ME/MC. The proposed ME/MC hardware was implemented to ASIC with TSMC 90nm HVT CMOS library. The implemented hardware occupies about 330K gates and stably operates the clock frequency of 143MHz.

• Proceedings of the IEEK Conference
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• 2000.06d
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• pp.143-146
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• 2000

Motion Estimation/compensation(ME/MC) is one of the efficient interframe ceding techniques for its ability to reduce the high redundancy between successive frames of an image sequence. Calculating the blocking matching takes most of the encoding time. In this paper a new fast block matching algorithm(BMA) is developed for motion estimation and for reduction of the computation time to search motion vectors. The feature of the new algorithm comes from the center-biased checking concept and the trend of pixel movements. At first, Motion Vector(MV) is searched in ${\pm}$1 of search area and then the motion estimation is exploited in the rest block. The ASP and MSE of the proposed search algorithm show good performance.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.143-146
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• 1998

A new stereoscopic codec. structure using MPEG-2 multiview profile is presented in this paper. In the suggested codec., the left image is coded with motion estimation in the base layerand the right image is coded with disparity estimation in the enhancement layer. Since it is possible to calculate rough motion of the right image sequence with disparity and motion of the left image sequence, motion compensation of the enhancement layer is performed without motion estimation. Since the proposed codec. does not perform motion estimation in the enhancement layer encoding, it is simple and reduces the encoding time. We compared the PSNR of encoded image with three different structured codec., and the experimental results show that suggested codec. has comparable with other codecs.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.1C
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• pp.69-77
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• 2002

Sine digital signal processing for motion pictures requires huge amount of data computation to store, manipulate and transmit, more effective data compression is necessary. Therefore, the ITU-T recommended H.26x as data compression standards for digital motion pictures. The data compression method that eliminates time redundancies by motion estimation using relationship between picture frames has been widely used. Most video conding systems employ block matching algorithm for the motion estimation and compensation, and the algorithm is based on the minimun value of cast functions. Therefore, fast search algorithm rather than full search algorithm is more effective in real time low data rates encodings such as H.26x. In this paper, motion estimation employing the Nearest-Neighbors algorithm is designed to reduce search time using FPGA, coded in VHDL, and simulated and verified using Xilink Foundation.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.7 no.10
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• pp.2448-2463
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• 2013

The traditional block-based motion compensation methods in frame rate up-conversion (FRUC) only use a single uniquely motion vector field. However, there will always be some mistakes in the motion vector field whether the advanced motion estimation (ME) and motion vector analysis (MA) algorithms are performed or not. Once the motion vector field has many mistakes, the quality of the interpolated frame is severely affected. In order to solve the problem, this paper proposes a novel joint overlapped block motion compensation method (8J-OBMC) which adopts motion vectors of the interpolated block and its 8-neighbor blocks to jointly interpolate the target block. Since the smoothness of motion filed makes the motion vectors of 8-neighbor blocks around the interpolated block quite close to the true motion vector of the interpolated block, the proposed compensation algorithm has the better fault-tolerant capability than traditional ones. Besides, the annoying blocking artifacts can also be effectively suppressed by using overlapped blocks. Experimental results show that the proposed method is not only robust to motion vectors estimated wrongly, but also can to reduce blocking artifacts in comparison with existing popular compensation methods.

• Journal of Broadcast Engineering
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• v.9 no.1
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• pp.54-63
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• 2004

A new motion compensated frame Interpolation (MCI) algorithm by block based motion estimation (BME) is proposed. The block for the BME is composed of a large overlapped block for practical object motion estimation (ME) and a small block (which has a coinciding center with the ME-block) for the more precise motion compensated image description. Pixels in the block for the ME are sub-sampled to reduce computational complexity. The proposed method is executed with the various ME-blocks which have different size and sub-sampling ratio, and compared to the conventional method.

• Journal of Information Display
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• v.5 no.3
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• pp.1-7
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• 2004

We developed a novel frame interpolation method to interpolate a frame between two successive original frames. Using this method, we are able to apply a double-rate driving method instead of an impulse driving method where a black frame is inserted between two successive original frames. The double-rate driving method enables amelioration of the motion blur of LCDs caused by the characteristics of human vision without reducing the luminosity of the whole screen. The image quality of the double-rate driving method was also found to be better than that of an impulse driving method using our motion picture simulator and an actual panel. Our initial model of our frame interpolation method consists of motion estimation with a maximum matching pixel count estimation function, an area segmentation technique, and motion compensation with variable segmentation threshold. Although salt and pepper noise remained in a portion of an object mainly due to inaccuracy of motion estimation, we verified the validity of our method and the possibility of improvement in hold-type motion blurring.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.4
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• pp.275-285
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• 2003

The now video coding standard H.264 employs variable block size motion compensation, multiple references, and quarter-pel motion vector accuracy. These techniques are key features to accomplish higher coding gain, however, at the same time main factors that increase overall computational complexity. Therefore, in order to apply H.264 to many applications, key techniques are requested to improve their speed. For this reason, we propose a fast motion estimation which is suited for variable block size motion communication. In addition, we propose a fast mode decision method to choose the best mode at early stage. Experimental results show the reduction of the number of SAT SATD calculations by a factor of 4.5 and 2.6 times respectively, when we compare the proposed fast motion estimation and the conventional MVFAS $T^{［8-10］}$. Besides, the number of RDcost computations is reduced by about 45%. Therefore, the proposed methods reduces significantly its computational complexity without noticeable coding loss.