• Nuclear Engineering and Technology
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• 제52권8호
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• pp.1834-1846
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• 2020

The SMART (System-integrated Modular Advanced ReacTor) is an integral-type small modular reactor developed by KAERI (Korea Atomic Energy Research Institute). This paper discusses the development of a dynamic equivalent model of the SMART control rod drive mechanism that can be efficiently utilized for complicated analysis during the design of the SMART. A semi-empirical approach is used to develop the equivalent model; that is, the equivalent model is defined analytically and verified empirically. Two types of tests, dynamic characteristics tests and seismic loading tests, are conducted for the development and verification of the dynamic equivalent model, respectively. Acceleration response spectra from the seismic analysis based on the developed equivalent model show good agreement with those from the seismic loading tests.

• 전기학회논문지
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• 제62권1호
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• pp.109-119
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• 2013

This paper presents the design of the Safety Programmable Logic Controller (SPLC) used in the Nuclear Power Plants, an analysis of a reliability for the SPLC using a markov model. The architecture of the SPLC is designed to have the multiple modular redundancy composed of the Dual Modular Redundancy(DMR) and the Triple Modular Redundancy(TMR). The operating system of the SPLC is designed to have the non-preemptive state based scheduler and the supervisory task managing the sequential scheduling, timing of tasks, diagnostic and security. The data communication of the SPLC is designed to have the deterministic state based protocol, and is designed to satisfy the effective transmission capacity of 20Mbps. Using Markov model, the reliability of SPLC is analyzed, and assessed. To have the reasonable reliability such as the mean time to failure (MTTF) more than 10,000 hours, the failure rate of each SPLC module should be less than $2{\times}10^{-5}$/hour. When the fault coverage factor (FCF) is increased by 0.1, the MTTF is improved by about 4 months, thus to enhance the MTTF effectively, it is needed that the diagnostic ability of each SPLC module should be strengthened. Also as the result of comparison the SPLC and the existing safety grade PLCs, the reliability and MTTF of SPLC is up to 1.6-times and up to 22,000 hours better than the existing PLCs.

• Nuclear Engineering and Technology
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• 제54권3호
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• pp.1109-1114
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• 2022

The SMART (System-integrated Modular Advanced ReacTor) is an integral-type small modular reactor developed by KAERI (Korea Atomic Energy Research Institute). This paper discusses the feasibility and applicability of a 3D-based equivalent model using dynamic condensation method for seismic analysis of a SMART control rod drive mechanism. The equivalent model is utilized for complicated seismic analysis during the design of the SMART. While the 1D-based beam-mass equivalent model is widely used in the nuclear industry for its calculation efficiency, the 3D-based equivalent model is suggested for the seismic analysis of SMART to enhance the analysis accuracy of the 1D-based equivalent model while maintaining its analysis efficiency. To verify the suggested model, acceleration response spectra from seismic analysis based on the 3D-based equivalent model are compared to those from the 1D-based beam-mass equivalent model and experiments. The accuracy and efficiency of the dynamic condensation method are investigated by comparison to analysis results based on the conventional modeling methodology used for seismic analysis.

• 한국건설관리학회논문집
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• 제22권4호
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• pp.11-19
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• 2021

모듈러 공법이 지닌 다양한 장점과 관련 시장의 지속적인 성장에도 불구하고, 국내에서는 아직 이와 관련한 구체적인 제도가 확립되어 있지 않아 활성화가 어려운 실정이다. 이에 따라 본 연구는 모듈러 관련 산업 현황과 연구 동향을 고찰하고, 사전 조사를 통해 건설업계 실무자들의 의견을 반영하여 모듈러 공법 활성화를 위한 4대 개선영역과 12개의 개선과제를 도출하였다. 이후 전문가집단을 대상으로 AHP 분석을 수행하여 개선영역 및 개선과제의 상대적 중요도를 평가하였으며, 기대효용평가를 수행하여 이를 반영한 개선과제의 최종 우선순위를 도출하였다. 또한 응답자를 기업과 학계/연구계로 나누어 의견을 비교·분석하여 모듈러 공법에 대한 시각차를 확인하였고, 분석 결과를 통해 정책 수립 및 제도 개선의 방향을 제시하였다. 본 연구에서 도출된 우선순위 개선과제들은 향후 모듈러 공법 활성화를 위한 정책적 의사결정을 위한 기초자료로 활용될 수 있을 것으로 기대된다.

• 전력전자학회논문지
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• 제22권4호
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• pp.285-296
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• 2017

This paper proposes an improved modulation scheme for the medium voltage modular multi-level converter (MMC), which operates in the nearest level control and applies in the medium voltage direct current (MVDC) system. In the proposed modulation scheme, the offset (neutral-to-zero output) voltage is adjusted, with the phase voltage magnitude, thereby maintaining a constant value with N+1 level in the controllable modulation index (MI) range. In order to confirm the proposed scheme's validity, computer simulations for the 22.9 kV - 25 MVA MMC were performed with PSCAD/EMTDC, as well as hardware experiments for the 380 V - 10 kVA MMC. The proposed modulation scheme offers to build a constant pole voltage regardless of the MI value, and to build a phase voltage with improved total harmonic distortion (THD).

• 한국건설순환자원학회논문집
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• 제10권3호
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• pp.351-357
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• 2022

본 연구에서는 해양 건설환경을 고려한 초고성능 콘크리트 해상 모듈러 잔교 시스템을 개발하고자 한다. 해상 모듈러 잔교 시스템은 최근에 개발된 압축강도 120 MPa 이상, 직접인장강도 7 MPa 이상을 갖는 초고성능 콘크리트 적용하여 설계, 제작 및 구조성능평가를 통하여 적용 가능성을 분석하였다. 기존에 프리캐스트 콘크리트로 시공된 해상 잔교는 시공단계에서 기초 파일부 항타 시 위치 또는 수직 변형으로 인한 오차를 해결하기 위한 아이디어와 가능성을 검증하고자 하였다. 또한, 구조성능 평가를 위하여 잔교 실험체를 초고성능 콘크리트를 이용하여 제작하였다. 휨 실험을 통하여 하중 분석을 수행한 결과, 예측 휨강도 대비 측정 휨강도는 극한한계상태에서 약 9 % 이상의 내하력을 확보하여 본 실험에서 요구하는 성능을 만족하였다. 향후 본 연구를 통하여 개발된 해상 모듈러 잔교 시스템을 활용한다면 충분한 내구성과 시공성으로 인한 경쟁력을 확보할 수 있을 것으로 판단된다.

• 호남수학학술지
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• 제35권1호
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• pp.73-82
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• 2013

There are some identities between the representations of Hecke operators defined on a subspace of modular forms associated with orders of a Quaternion algebra. In this paper, we find the identities between the zeta functions attached to these representations.

• 대한임베디드공학회논문지
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• 제12권1호
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• pp.11-18
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• 2017

Finite field arithmetic has been extensively used in error correcting codes and cryptography. Low-complexity and high-speed designs for finite field arithmetic are needed to meet the demands of wider bandwidth, better security and higher portability for personal communication device. In particular, cryptosystems in GF($2^m$) usually require computing exponentiation, division, and multiplicative inverse, which are very costly operations. These operations can be performed by computing modular AB multiplications or modular $AB^2$ multiplications. To compute these time-consuming operations, using $AB^2$ multiplications is more efficient than AB multiplications. Thus, there are needs for an efficient $AB^2$ multiplier architecture. In this paper, we propose a low latency Montgomery $AB^2$ multiplier using redundant representation over GF($2^m$). The proposed $AB^2$ multiplier has less space and time complexities compared to related multipliers. As compared to the corresponding existing structures, the proposed $AB^2$ multiplier saves at least 18% area, 50% time, and 59% area-time (AT) complexity. Accordingly, it is well suited for VLSI implementation and can be easily applied as a basic component for computing complex operations over finite field, such as exponentiation, division, and multiplicative inverse.

• 토지주택연구
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• 제14권2호
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• pp.97-107
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• 2023

본 연구는 자연 재해 및 사회 재난 발생으로 주거권의 보장을 위한 임시주거 시설의 수요가 증가하는 추세에 대비하여 이재민에게 신속하게 양질의 주택을 공급코자 수행되었다. 대량 생산 및 운반에 효율적인 계획 모델을 만들기에 적합한 DfMA 설계 방식, 즉 제조 및 조립 기반 모듈러주택 모델을 제시하였으며, 특징은 다음 세 가지이다. 첫째, 모듈러주택을 서비스 모듈과 기능 모듈로 구분하여 고정성과 변동성을 발전시켜 다양성을 만들도록 계획했다. 둘째, 제품과 같이 이동하여 편리한 위치에 놓고 사용할 수 있도록 계획하여 대지 여건 및 수요에 맞춰 융통성 있는 배치계획을 하는 시스템을 제안 했다. 이러한 계획은 동일한 주택을 대량 생산하여 국내외의 다양한 위치와 사업에 활용할 수 있다. 셋째, 생산효율성을 높일 수 있도록 생산의 자동화를 염두해 두고 건식 공법으로 공정을 단순화하고 최소화하는 방식으로 계획했다. 이러한 DfMA설계방식 적용으로 제작 및 시공기간 단축, 공사비 절감, 주택 품질 제고를 도모하여 건설 생산성을 향상시킬 수 있다.

• 대한임베디드공학회논문지
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• 제7권2호
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• pp.79-84
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• 2012

Efficient arithmetic design is essential to implement error correcting codes and cryptographic applications over finite fields. This article presents an efficient $AB^2$ multiplier in GF($2^m$) using a polynomial representation. The proposed multiplier produces the result in m clock cycles with a propagation delay of two AND gates and two XOR gates using O($2^m$) area-time complexity. The proposed multiplier is highly modular, and consists of regular blocks of AND and XOR logic gates. Especially, exponentiation, inversion, and division are more efficiently implemented by applying $AB^2$ multiplication repeatedly rather than AB multiplication. As compared to related works, the proposed multiplier has lower area-time complexity, computational delay, and execution time and is well suited to VLSI implementation.