• Journal of Power Electronics
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• v.19 no.6
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• pp.1486-1495
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• 2019

Dealing with the DC link fault poses a technical problem for an HVDC based on a modular multilevel converter. The fault suppressing mechanisms of several sub-module topologies with DC fault current blocking capacity are examined in this paper. An improved half-bridge sub-module topology with double direction control switch is also designed to address the additional power consumption problem, and a sub-module topology called hybrid double direction blocking sub module (HDDBSM) is proposed. The DC fault suppression characteristics and sub-module capacitor voltage balance problem is also analyzed, and a self-startup method is designed according to the number of capacitors. The simulation model in PSCAD/EMTDC is built to verify the self-startup process and the DC link fault suppression features.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.12
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• pp.133-140
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• 2013

Cascaded H-Bridge multi-level inverters can be implemented through the series connection of single-phase modular power bridges. In recent years, multi-level inverters are becoming increasingly popular for high power applications due to its improved harmonic profile and increased power ratings. This paper presents a control method for balancing the dc-link voltage and ride-through enhancement, a modified pulse width-modulation Compensation algorithm of cascaded H-bridge multi-level inverters. During an under-voltage protection mechanism, causing the system to shut down within a few milliseconds after a power interruption in the main input sources. When a power interruption occurs finish, if the system is a large inertia restarting the load a long time is required. This paper suggests modifications in the control algorithm in order to improve the sag ride-through performance of ac inverter. The new proposed strategy recommends maintaining the DC-link voltage constant at the nominal value during a sag period, experimental results are presented.

• Journal of Power Electronics
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• v.17 no.1
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• pp.242-252
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• 2017

This paper deals with the blocking of DC-fault current during DC cable short-circuit conditions in HVDC (High-Voltage DC) transmission systems utilizing Modular Multilevel Converters (MMCs), where a new SubModule (SM) topology circuit for the MMC is proposed. In this SM circuit, an additional Insulated-Gate Bipolar Translator (IGBT) is required to be connected at the output terminal of a conventional SM with a half-bridge structure, hereafter referred to as HBSM, where the anti-parallel diodes of additional IGBTs are used to block current from the grid to the DC-link side. Compared with the existing MMCs based on full-bridge (FB) SMs, the hybrid topologies of HBSM and FBSM, and the clamp-double SMs, the proposed topology offers a lower cost and lower power loss while the fault current blocking capability in the DC short-circuit conditions is still provided. The effectiveness of the proposed topology has been validated by simulation results obtained from a 300-kV 300-MW HVDC transmission system and experimental results from a down-scaled HVDC system in the laboratory.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.3
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• pp.17-23
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• 2020

This paper proposes a simulation model using an equivalent circuit for the development of an MMC system. The MMC has been chosen as the most suitable topology for high voltage power transmission, such as a voltage-type HVDC, and it has dozens to hundreds of sub-modules in the form of a half-bridge or full-bridge connected in series. A simulation study is essential for the development of an MMC algorithm. On the other hand, it is virtually impossible to construct and implement MMC simulation models, including hundreds or thousands of switching devices. Therefore, this paper presents an MMC equivalent model, which is easily expandable and implemented by modeling the dynamic characteristics. The voltage and current equation of the equivalent circuit was calculated using the direction of the arm current and switching signal. The model was implemented on Matlab/Simulink. In this paper, to show the validity of the model developed using Matlab/Simulink, the simulation results of a five-level MMC using the real switching element and the proposed equivalent model are shown. The validity of the proposed model was verified by showing that the current and voltage waveform in the two models match each other.

• Structural Engineering and Mechanics
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• v.17 no.3_4
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• pp.393-408
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• 2004

There exists a clear need to monitor the performance of civil structures over their operational lives. Current commercial monitoring systems suffer from various technological and economic limitations that prevent their widespread adoption. The wires used to route measurements from system sensors to the centralized data server represent one of the greatest limitations since they are physically vulnerable and expensive from an installation and maintenance standpoint. In lieu of cables, the introduction of low-cost wireless communications is proposed. The result is the design of a prototype wireless sensing unit that can serve as the fundamental building block of wireless modular monitoring systems (WiMMS). An additional feature of the wireless sensing unit is the incorporation of computational power in the form of state-of-art microcontrollers. The prototype unit is validated with a series of laboratory and field tests. The Alamosa Canyon Bridge is employed to serve as a full-scale benchmark structure to validate the performance of the wireless sensing unit in the field. A traditional cable-based monitoring system is installed in parallel with the wireless sensing units for performance comparison.

• Journal of Power Electronics
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• v.10 no.1
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• pp.9-13
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• 2010

This paper proposes an input-series-output-parallel connected ZVS full bridge converter with interleaved control for photovoltaic power conditioning systems (PV PCS). The input-series connection enables a fully modular power-system architecture, where low voltage and standard power modules can be connected in any combination at the input and/or at the output, to realize any given specifications. Further, the input-series connection enables the use of low-voltage MOSFETs that are optimized for a very low RDSON, thus, resulting in lower conduction losses. The system costs decrease due to the reduced current, and the volumes of the output filters due to the interleaving technique. A topology for a photovoltaic (PV) dc/dc converter that can dramatically reduce the power rating and increase the efficiency of a PV system by analyzing the PV module characteristics is proposed. The control scheme, consisting of an output voltage loop, a current loop and input voltage balancing loops, is proposed to achieve input voltage sharing and output current sharing. The total PV system is implemented for a 10-kW PV power conditioning system (PCS). This system has a dc/dc converter with a 3.6-kW power rating. It is only one-third of the total PV PCS power. A 3.6-kW prototype PV dc/dc converter is introduced to experimentally verify the proposed topology. In addition, experimental results show that the proposed topology exhibits good performance.