• Title/Summary/Keyword: modular arithmetic

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Efficient Modular Multiplication for 224-bit Prime Field (224비트 소수체에서 효율적인 모듈러 곱셈)

  • Chang, Nam Su
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.29 no.3
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    • pp.515-518
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    • 2019
  • The performance of Elliptic Curves Cryptosystem(ECC) is dominated by the modular multiplication since the elliptic curve scalar multiplication consists of the modular multiplication in projective coordinates. In this paper, we propose a new method that combines the Karatsuba-Ofman multiplication method and a new modular reduction algorithm in order to improve the performance of the modular multiplication for NIST p224 in the FIPS 186-4 standard. The proposed method leads to a running time improvement for computing the modular multiplication about 25% faster than the previous methods. The results also show that the method can reduce the arithmetic complexity by half when compared with traditional implementations on the standpoint of the modular reduction.

Resource and Delay Efficient Polynomial Multiplier over Finite Fields GF (2m) (유한체상의 자원과 시간에 효율적인 다항식 곱셈기)

  • Lee, Keonjik
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.16 no.2
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    • pp.1-9
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    • 2020
  • Many cryptographic and error control coding algorithms rely on finite field GF(2m) arithmetic. Hardware implementation of these algorithms needs an efficient realization of finite field arithmetic operations. Finite field multiplication is complicated among the basic operations, and it is employed in field exponentiation and division operations. Various algorithms and architectures are proposed in the literature for hardware implementation of finite field multiplication to achieve a reduction in area and delay. In this paper, a low area and delay efficient semi-systolic multiplier over finite fields GF(2m) using the modified Montgomery modular multiplication (MMM) is presented. The least significant bit (LSB)-first multiplication and two-level parallel computing scheme are considered to improve the cell delay, latency, and area-time (AT) complexity. The proposed method has the features of regularity, modularity, and unidirectional data flow and offers a considerable improvement in AT complexity compared with related multipliers. The proposed multiplier can be used as a kernel circuit for exponentiation/division and multiplication.

Low Complexity Systolic Montgomery Multiplication over Finite Fields GF(2m) (유한체상의 낮은 복잡도를 갖는 시스톨릭 몽고메리 곱셈)

  • Lee, Keonjik
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.18 no.1
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    • pp.1-9
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    • 2022
  • Galois field arithmetic is important in error correcting codes and public-key cryptography schemes. Hardware realization of these schemes requires an efficient implementation of Galois field arithmetic operations. Multiplication is the main finite field operation and designing efficient multiplier can clearly affect the performance of compute-intensive applications. Diverse algorithms and hardware architectures are presented in the literature for hardware realization of Galois field multiplication to acquire a reduction in time and area. This paper presents a low complexity semi-systolic multiplier to facilitate parallel processing by partitioning Montgomery modular multiplication (MMM) into two independent and identical units and two-level systolic computation scheme. Analytical results indicate that the proposed multiplier achieves lower area-time (AT) complexity compared to related multipliers. Moreover, the proposed method has regularity, concurrency, and modularity, and thus is well suited for VLSI implementation. It can be applied as a core circuit for multiplication and division/exponentiation.

Improved Modular Inversion over GF(p)

  • Choi, Jong-Hwa;Kim, Yong-Dae;Ahn, Young-Il;You, Young-Gap
    • International Journal of Contents
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    • v.3 no.2
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    • pp.40-43
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    • 2007
  • This paper proposed a new modular inverse algorithm based on the right-shifting binary Euclidean algorithm. For an n-bit numbers, the number of operations for the proposed algorithm is reduced about 61.3% less than the classical binary extended Euclidean algorithm. The proposed algorithm implementation shows substantial reduction in computation time over Galois field GF(p).

Efficient Modular Reduction for NIST Prime P-256 (NIST 소수 P-256에서 효율적인 모듈러 감산 방법)

  • Chang, Nam Su
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.29 no.3
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    • pp.511-514
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    • 2019
  • Elliptic Curves Cryptosystem(ECC) provides the same level of security with relatively small key sizes, as compared to the traditional cryptosystems. The performance of ECC over GF(2m) and GF(p) depends on the efficiency of finite field arithmetic, especially the modular multiplication which is based on the reduction algorithm. In this paper, we propose a new modular reduction algorithm which provides high-speed ECC over NIST prime P-256. Detailed experimental results show that the proposed algorithm is about 25% faster than the previous methods.

나머지 수 체계의 부활

  • 예홍진
    • Journal for History of Mathematics
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    • v.12 no.2
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    • pp.47-54
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    • 1999
  • We introduce some historical facts on number theory, especially prime numbers and modular arithmetic. And then, with the viewpoint of computer arithmetic, residue number systems are considered as an alternate to positional number systems so that high performance and high speed computation can be achieved in a specified domain such as cryptography and digital signal processing.

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