• Proceedings of the IEEK Conference
• /
• 1998.10a
• /
• pp.987-990
• /
• 1998

An optical adder for a modified signed-digit(MSD) number system using joint spatial encoding method is proposed. In order to minimize the numbers of symbolic substitution rules, nine input patterns were divided into five groups of the same addition results. For recognizing the input reference patterns, masks and reference patterns without any other spatial operations are used. This adder is implemented by smaller system in size than a conventional adder.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.41 no.6
• /
• pp.43-51
• /
• 2004

An optical parallel modified signed-digit(MSD) number adder system is proposed by using triple rail-coding input patterns and serial arrangement method of symbolic substitution. By combing overlapped arithmetic results. which are produced by encoding MSD input as triple rail-coding patterns. into the same patterns, symbolic substitution rules are reduced and also by using serialized and space-shifted input patterns in optical experiments, the optical adder without space-shifting operation, NOR operation and threshold operation is implemented.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.38 no.11
• /
• pp.810-820
• /
• 2001

Conventional binary adder requires a carry propagation to the most significant bit, and leads to serial addition. However, optical adder using a modified signed digit(MSD) number system has been Proposed to reduce the carry propagation chain encountered in binary adder. In this paper, in order to minimize the number of symbolic substitution(SS) rules, nine input patterns were divided into five groups of the same addition results. For recognizing the input reference patterns, serial connections of joint spatial encoded patterns and masks without any other spatial operations are used.

• Journal of Biomedical Engineering Research
• /
• v.28 no.3
• /
• pp.423-428
• /
• 2007

Programmable FIR filters are used in various signal processing tasks in medical ultrasound imaging, which are one of the major factors increasing hardware complexity. A widely used method to reduce the hardware complexity of a programmable FIR filter is to encode the filter coefficients in the canonic signed digit (CSD) format to minimize the number of nonzero digits (NZD) so that the multipliers for each filter coefficients can be replaced with fixed shifters and programmable multiplexers (PM). In this paper, a new structure for programmable FIR filters with a improved frequency response and a reduced hardware complexity compared to the conventional shift-and-add architecture using PM is proposed for implementing a very small portable ultrasound scanner. The CSD codes are optimized such that there exists at least one common nonzero digit between neighboring coefficients. Such common digits are then implemented with the same shifters. For comparison, synthesisable VHDL models for programmable FIR filters are developed based on the proposed and the conventional architectures. When these filters have the same hardware complexity, pass-band ana stop-band ripples of the proposed filter are lower than those of the conventional filter by about $0.01{\sim}0.19dB$ and by about $5{\sim}10dB$, respectively. For the same filter performance, the hardware complexity of the proposed architecture is reduced by more than 20% compare to the conventional SaA architecture.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.12C
• /
• pp.1739-1747
• /
• 2004

In this paper, an efficient radix-4 systolic VLSI architecture for RSA public-key cryptosystem is proposed. Due to the simple operation of iterations and the efficient systolic mapping, the proposed architecture computes an n-bit modular exponentiation in n$^{2}$ clock cycles since two modular multiplications for M$_{i}$ and P$_{i}$ in each exponentiation process are interleaved, so that the hardware is fully utilized. We encode the exponent using Radix-4. SD (Signed Digit) number system to reduce the number of modular multiplications for RSA cryptography. Therefore about 20% of NZ (non-zero) digits in the exponent are reduced. Compared to conventional approaches, the proposed architecture shows shorter period to complete the RSA while requiring relatively less hardware resources. The proposed RSA architecture based on the modified Montgomery algorithm has locality, regularity, and scalability suitable for VLSI implementation.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.31A no.8
• /
• pp.26-33
• /
• 1994

Optical adders using a modified signed-digit(MSD) number system have been proposed to restrict the carry propagation chain encountered in a conventional binary adder to two positions to the left. But, MSD number system must encode three different states to represent the three possible digits of MSD. In this paper, we propose the design of an optical adder based on 1-bit addition rules by using the method of symbolic substitution (SS). We show that this adder can use binary input which is used by a digital computer, as it is and be implemented by smaller system in size than MSD adder.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.8 no.4
• /
• pp.263-269
• /
• 2015

Digital watermarking is imperceptible and statistically undetectable information embeds into digital data. Most information in digital audio watermarking schemes have used binary random sequences. The embedded binary random sequence distorts and modifies the original data while it plays a vital role in security. In this paper, a binary random sequence to improve imperceptibility in perceptual region of the human auditory system is proposed. The basic idea of this work is a modification of a binary random sequence according to the frequency analysis of adjacent binary digits that have different signs in the sequence. The canonical signed digit code (CSDC) is also applied to modify a general binary random sequence and the pair-matching function between original and its modified version. In our experiment, frequency characteristics of the proposed binary random sequence was evaluated and analyzed by Bark scale representation of frequency and frequency gains.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.18 no.6
• /
• pp.871-880
• /
• 1993

Conventional binary addition rules require a carry formation and propagation to the most significant bit, and lead to serial addition. Thus, the carry progapation in a binary addition stands as a hindrance to the full utilization of parallelism optics offers, Optical adders using a modified signed-digit(MSD) number system have been proposed to eliminate the carry propagation chain states to represent the three possible digits of MSD number system must encode three different states to represent the three possible digits of MSD. In the paper, we propose the design of a parallel optical adder based on 2-bit addition rules using the method of symbolic substitution(SS).