• Journal of KIISE
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• v.42 no.11
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• pp.1314-1321
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• 2015

Mobile devices employ buffer cache mechanisms, just as in computer systems such as desktops or servers, to mitigate the performance gap between main memory and secondary storage. However, DRAM has a problem in that it accelerates battery consumption by performing refresh operations periodically to maintain the stored data. In this paper, we propose a novel buffer cache scheme to increase the battery lifecycle in mobile devices based on a hybrid main memory architecture consisting of DRAM and non-volatile PCM. We also suggest a new buffer cache policy that allocates buffers based on process states to optimize the performance and endurance of PCM. In particular, our algorithm allocates each page to the appropriate position corresponding to the state of the application that owns the page, and tries to ensure a rapid response of foreground applications even with a small amount of DRAM memory. The experimental results indicate that the proposed scheme reduces the elapsed time of foreground applications by 58% on average and power consumption by 23% on average without negatively impacting the performance of background applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.7 s.361
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• pp.62-70
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• 2007

In this paper, we design a mobile camera processor to support the MIPI CSI-2 and DPHY specification. The lane management sub-layer of CIS2 handles multi-lane configuration. Thus conceptually, the transmitter and receiver have each independent buffer on multi lanes. In the proposed architecture, the independent buffers are merged into a single common buffer. The single buffer architecture can flexibly manage data on multi lanes though the number of supported lanes are mismatched in a camera processor transmitter and a host processor. For a key issue for the data synchronization problem, the synchronization start codes are added as the starting for image data. We design synchronization logic to synchronize the received clock and to generate the byte clock. We present the verification results under proposed test bench. And we show the waves of simulation and logic synthesis results of the designed processor.

• FOCUS: LIFE SCIENCE
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• no.1
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• pp.1.1-1.4
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• 2024

This article provides comprehensive guidance on the maintenance, cleaning, regeneration, and storage of silica-based HPLC (High-Performance Liquid Chromatography) columns. The general considerations emphasize the importance of using in-line filters and guard cartridges to protect columns from blockage and irreversible sample adsorption. While these measures help, contamination by strongly adsorbed sample components can still occur over time, leading to an increase in back pressure, loss of efficiency, and other issues. To maximize column lifetime, especially with UHPLC (Ultra-High Performance Liquid Chromatography) columns, it is advisable to use ultra-pure solvents, freshly prepared aqueous mobile phases, and to filter all samples, standards, and mobile phases. Additionally, an in-line filter system and sample clean-up on dirty samples are recommended. However, in cases of irreversible compound adsorption or column voiding, regeneration may not be possible. The document also provides specific recommendations for column cleaning procedures, including the flushing procedures for various types of columns such as reversed phase, unbonded silica, bonded normal phase, anion exchange, cation exchange, and size exclusion columns for proteins. The flushing procedures involve using specific solvents in a series to clean and regenerate the columns. It is emphasized that the flow rate during flushing should not exceed the specified limit for the particular column, and the last solvent used should be compatible with the mobile phase. Furthermore, the article outlines the storage conditions for silica based HPLC columns, highlighting the impact of storage conditions on the column's lifetime. It is recommended to flush all buffers, salts, and ion-pairing reagents from the column before storage. The storage solvent should ideally match the one used in the initial column test chromatogram provided by the manufacturer, and column end plugs should be fitted to prevent solvent evaporation and drying out of the packing bed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.9B
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• pp.1082-1091
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• 2011

Power-reduction techniques based on DVFS(Dynamic Voltage and Frequency Scaling) are crucial for lengthening operating times of battery powered mobile systems. This paper proposes an optimal DVFS scheduling algorithm for decoders with memory size limitation on display buffer, which is realistic constraints not properly touched in the previous works. Furthermore, we mathematically prove that the proposed algorithm is optimal in the limited display buffer and limited clock frequency model, and also can be used for feasibility check. Simulation results show the proposed algorithm outperformed the previous heuristic algorithms by 7% in average, and the performance of all algorithms using display buffers saturates at about 10 frame size.

• Journal of the Korean Society for Precision Engineering
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• v.27 no.2
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• pp.60-69
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• 2010

Lookup-Table (LUT) based fuzzy controller for obstacle avoidance enhances operations faster in multiple obstacles environment. An LUT based fuzzy controller with Positive/Negative (P/N) fuzzy rule base consisting of 18 rules was introduced in our paper$^1$ and this paper shows a 50-rule P/N fuzzy controller for enhancing performance in obstacle avoidance. As a rule, the more rules are necessary, the more buffers are required. This paper suggests LUT sharing method in order to reduce LUT buffer size without significant degradation of performance. The LUT sharing method makes buffer size independent of the whole fuzzy system's complexity. Simulation using MSRDS(MicroSoft Robotics Developer Studio) evaluates the proposed method, and in order to investigate its performance, experiments are carried out to Pioneer P3-DX in the LabVIEW environment. The simulation and experiments show little difference between the fully valued LUT-based method and the LUT sharing method in operation times. On the other hand, LUT sharing method reduced its buffer size by about 95% of full valued LUT-based design.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.4
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• pp.940-949
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• 1998

The paper proposes an effective mechanism hiring the adaptive buffer control schemes on the mobile seceiver's side that can resolve the problems of delay spikes caused by the handover process onthe cell boundaries when they transmit real-time moving images through the high speed wireless channels. to confirm the effectiveness of the proposed schemes, we have modeled the characteristics of the random errors on the wireless channels, the burst errors and that of the transmission delay by the handover. We also compared the rate of the delay-adaptation of the receive buffers caused by the delay and delay spikes. the comparison was done by testing the suggested schemes against the existing schemes by applying tehm to the packet delay model. We also could identify the noticable reduction of the casesof buffer delay and overflow compared with the conventional schemes, by applying the suggested algorithm to the video image compressed by H.263.

• ETRI Journal
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• v.28 no.3
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• pp.301-310
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• 2006

In mobile communications, a class of variable-complexity algorithms for convolutional decoding known as sequential decoding algorithms is of interest since they have a computational time that could vary with changing channel conditions. The Fano algorithm is one well-known version of a sequential decoding algorithm. Since the decoding time of a Fano decoder follows the Pareto distribution, which is a heavy-tailed distribution parameterized by the channel signal-to-noise ratio (SNR), buffers are required to absorb the variable decoding delays of Fano decoders. Furthermore, since the decoding time drawn by a certain Pareto distribution can become unbounded, a maximum limit is often employed by a practical decoder to limit the worst-case decoding time. In this paper, we investigate the relations between buffer occupancy, decoding time, and channel conditions in a system where the Fano decoder is not allowed to run with unbounded decoding time. A timeout limit is thus imposed so that the decoding will be terminated if the decoding time reaches the limit. We use discrete-time semi-Markov models to describe such a Fano decoding system with timeout limits. Our queuing analysis provides expressions characterizing the average buffer occupancy as a function of channel conditions and timeout limits. Both numerical and simulation results are provided to validate the analytical results.

• Journal of the Korean Society for Railway
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• v.10 no.6
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• pp.758-765
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• 2007

In this paper, we propose an efficient seamless handoff scheme to minimize packet loss and unnecessary packets on the Internet using the peculiar mobility characteristics of public vehicles such as trains. MR (Mobile Router) in a train visits each AR (Access Router) in the fixed order. As the MR detects reachability to the NAR (Next Access Router) on the new link, the PAR (Previous Access Router) can directly deliver packets from MR's HA (Home Agent) to the NAR according to the HML (Handoff Mobile router List). Then. the NAR buffers them until the MR finishes L3 (Layer 3) handoff procedure with the NAR. Therefore, our scheme can support a seamless handoff without the packet loss and unnecessary packets on the Internet. The result of our performance evaluation has shown that the proposed scheme could provide excellent performance, compared with the NEMO basic support protocol and the Bi-casting protocol.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.36S no.7
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• pp.25-33
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• 1999

This paper proposes a handover algorithm for the mobile host in order to reduce the number of unnecessary retransmissions during handover. In our proposal, the home agent buffers user data after receiving the registration request message form the foreign agent and then transmits them again after a predefined time. We also analyze the packet disordering probability between two user data under an assumption that the home agent generates all user data. One of two user data is the one which has been generated just before the home agent receives the registration request message and the other is generated just after that. Simulation results show that our proposal provides efficient handover for a mobile host by reducing the packet disordering probalility.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.291-292
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• 2014

High-speed video transmission modes of master bridge IC are implemented, which supports MIPI (Mobile Industry Processor Interface) DSI (Display Serial Interface) standard. MIPI DSI master bridge IC sends RGB data and various commands to display module (slave) in order to test it. The master bridge IC consists of buffers storing video data of two lines, packet generation block, and D-PHY layer that distributes packets to data lanes and transmits them to slave. In addition, it supports four bpp (bit per pixel) formats and three transmission modes including Burst and Non-Burst (Sync Events, Sync Pulses types). The designed bridge IC is verified by RTL simulations showing that it functions correctly for various operating parameters.